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EVG achieves 5 Star rating for first time in both “10 BEST” and “THE BEST” suppliers segments; continues winning streak with 20th consecutive year listed among “THE BEST” suppliers EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology, and semiconductor markets, today announced...
NCP and NCF Property Optimization Delivers High-Reliability Results Semiconductor package sizes are getting smaller and bump pitches narrower while the number of input/output (I/O) continues to increase. The traditional flip chip process, which assembles the chip with copper (Cu) pillar interconnects to the substrate using a mass reflow technique, faces...
Breakthrough wafer-level optics technologies help solve a key challenge of connecting many fibers to silicon chips for datacom and telecom applications FLORIAN, Austria and JERUSALEM, March 2, 2022—EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, and Teramount, the leader...
EVG is the first semiconductor equipment supplier ever to receive Preferred Supplier status EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it has been named a “Preferred Supplier” in the field of semiconductor by the Global...
I was fortunate enough to join StratEdge Corporation in May 2021 as an Engineering Technician working in the semiconductor packaging industry. I am currently an aerospace engineering student at Southwestern College and transferring to San Diego State next fall. In my time at StratEdge, I have had the opportunity to...
Tezzaron’s multi-project wafer program: participant perspectivesTo follow up with last week’s report on Tezzaron’s multi=project wafer program (MPW), I asked a few of the participants to share information about their part in the project, and the benefits of working in this paradigm. The first respondent was Donald Chiarulli, Professor...
It wasn’t on the final agenda, but thanks to a last-minute presentation switch by BiTS Workshop keynoter Jim Feldhan, president of Phoenix-based Semico Research, 3D became a featured topic at this year’s event. For the past few years, BiTS General Chair, Fred Taber, has contracted me to conduct video interviews...
My head is spinning. I just spent a few hours reading through all the latest 3D technology posts on various semiconductor news websites; something I find myself doing a lot more ever since I took on 3D-ICs.com. As editorial director of that site, it’s my job to sift through all...
Things have been pretty crazy lately, what with wearing several hats and all. I spent two days in Silicon Valley last week visiting some companies on behalf of Chip Scale Review, and also at SEMI for an Advanced Packaging Committee meeting for SEMICON West to hammer out the 3D program. ...
I’ve been talking a lot about the collaborative efforts in the form of open and closed consortia and joint development agreements that seem to be carrying 3D IC integration forward to market adoption. Another approach is a multi-project wafer program, in which participants cost-share to build multiple device prototypes...
