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The Brighter Side of SEMICON West 2017

Generally, I avoid reading other journalists’ coverage of events I’ve attended until I’ve had a chance to finish my own coverage. But there it was in my inbox in a recent edition of Semiconductor Packaging News: “Five Takeaways from Semicon” by Semi Engineering’s Mark LePedus. I couldn’t resist. I had...

IMAPS DPC 2017 Covers Range of High-tech Topics, Including EDA

The WeKoPa Resort near Phoenix was the venue for the latest IC packaging focused conference, IMAPS DPC 2017, which took place in early March. The exhibition floor and all the sessions I joined were well attended and covered a broad range of topics, including design tools and methodology demonstrations from...

Fraunhofer EMFT Signs Agreement to Implement ZiBond and DBI Technologies in MEMS Applications

Invensas Corporation, a wholly owned subsidiary of Tessera Technologies, Inc., (Nasdaq: TSRA) has announced that Fraunhofer EMFT has signed a new license agreement to incorporate ZiBond® and Direct Bond Interconnect (DBI®) technologies into their portfolio of foundry services. This agreement expands Fraunhofer EMFT’s world-class MEMS manufacturing capabilities with the most advanced...

Combining Technology Platforms and Integrating Complex Materials for New Applications

Heterogeneous integration is in many ways different from other research technology platforms. For one thing, the technology is mostly driven by specific customer needs and hence extremely difficult to anticipate. For some applications, we need to build, on top of CMOS, various sensors, filters, fluidic channels or photonics circuits. For...

SUSS MicroTec Launches SB6/8 Gen2: A Next-Generation Semi-Automated Permanent Wafer Bonder

Garching, October 7, 2014 – SUSS MicroTec, a leading supplier of equipment and process solutions for the semiconductor and related markets, has launched its next-generation semi-automated permanent wafer bonder today. The SB6/8 Gen2 Wafer Bonder is SUSS MicroTec’s state-of-the-art universal permanent wafer bonding system that handles wafers up to 200 mm and supports...

Addressing 3D Integration Challenges: Designing Materials for a Complex Landscape

3D integration has created a complex landscape of many different package architectures and integration approaches that have diverse materials needs and uncertain insertion timing. The multitude of processes required do not fit neatly into the established pigeonholes of front-end and back-end. Processes such as through silicon via (TSV) fabrication require...

Lessons Learned From the Trenches of 3D IC Manufacturing for Sensor Applications

The technologies are ready, the target high volume  applications for 3D IC manufacturing have been identified, and now it’s about convincing system architects there’s more to gain from designing in 2.5D and 3D ICs than there is to lose. At last week’s European 3D TSV Summit (January 21-22), two European...

EV Group: Never a Dull Moment

This is part of a series of short interviews, based on face-to-face meetings at SEMICON West 2013. Sitting down with EV Group execs to talk about the company’s latest achievements and contributions to the 3D IC cause has become an annual SEMICON West tradition. In fact, I’ve probably spent more...