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Hybrid Packages

No Redesign Required: StratEdge Revives Critical Hybrid Packages

A sustainable and cost-effective approach to maintaining vital defense, military, and aerospace applications Santee, Calif. – 15 February 2024 – StratEdge Corporation, a leader in the design, production, and assembly of high-frequency and high-power semiconductor packages for RF, microwave, and millimeter-wave devices, announces its capabilities for making hybrid packages used...

Will 3D Packaging Extend Moore’s Law?

There is a bit of debate about the role that heterogeneous packaging plays in furthering Moore’s Law. Moore’s Law has historically focused on the number of transistors doubling per unit area. In discussions at IEDM, it appears that the definition is being modified to include the chip stacking that is...

EV Group Lithography Solutions for Heterogeneous Integration and Wafer-level Packaging to Be Highlighted at ECTC 2022

Technical papers to highlight the breakthrough capabilities of EVG’s LITHOSCALE® maskless lithography solution and OmniSpray® resist coating technology for “More than Moore” applications EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that new developments in heterogeneous integration...

3D InCites Community Members SEMICON China 2021 Preview

SEMICON China attracts the world’s leading technology companies who design, develop, manufacture, and supply the technologies to manufacture the microelectronics that drive today’s most sophisticated consumer and commercial electronic products. Many of our 3D InCites community members are exhibiting and/or presenting during the show. Here is a preview of what...

48V Ecosystem and Power Packaging Trends

With each passing year, emerging growth application areas such as Automotive, Cloud Computing, Industrial Automation, and Telecom (5G) Infrastructure are garnering more attention. Although the application segments are different, there is a commonality in how voltage conversion and power distribution are achieved at the system level. System demands are becoming...

Update on 3D X-ray and DBI Technology for Advanced and 3D Packaging

The Microelectronics Packaging & Test Engineering Council (MEPTEC) held its monthly meeting at SEMI in Milpitas on April 10.  Two speakers outlined their companies’ capabilities and demonstrated their own expertise in solving specific industry challenges. Tom Gregorich presented why and how Zeiss supports IC package inspection with 3D X-ray machines,...

Technical Tidbits from IWLPC and MSEC 2017

It’s been a busy few weeks for me as I attended both the International Wafer Level Packaging Conference (IWLPC), October 24-26, 2017 at the DoubleTree in San Jose and SEMI-MSIG’s MEMS and Sensors Executive Congress, October 31-Nov. 2, at the Hayes Mansion in San Jose. In addition to taking in...

Move Over 3D Memory, Logic-on-Logic Stacks Have Arrived!

Chalk up another industry first for Tezzaron Semiconductor, who announced just today (or tomorrow, if you are there for the excitement at IEEE 3DIC in Sendai, Japan) that along with their manufacturing subsidiary, Novati Technologies, they have successfully manufactured the world’s first eight-layer 3D IC wafer stack containing active logic. (Figure 1). According...