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Back Together Again: SEMICON West Hybrid 2021

It was cold, a bit overcast, and I was headed to a SEMICON show in December. Usually, this would mean SEMICON Japan, but this was SEMICON West Hybrid 2021 during the second week of December in San Francisco. SEMI made the decision with its members last February to have SEMICON...

EV Group Wafer Bonding Solutions for Heterogeneous Integration and Wafer-Level Packaging to be Highlighted at ECTC 2019

Technical papers and interactive poster to highlight the breakthrough capabilities of EVG’s ComBond® high-vacuum bonding system and low-temp laser debonding solution for “More than Moore” applications   EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that new...

Temporary Bonding and Debonding Technologies for Fan-out Wafer-Level Packaging

Fan-out wafer-level packaging (FOWLP) is a cost-effective way to achieve high interconnect density and to manage larger I/O counts within an affordable package. It enables smaller footprints, higher interconnect density, better routing and thinner packages than current technologies. [1] A standard FOWLP wafer comprises known good die (KGD) and a...

3D Systems-on-Chip: Clever Circuit Partitioning To Extend Moore’s Law

In recent years, the technology of 3D integration has evolved into an economically interesting road. In particular, the technology is used to package the CMOS imagers you find in your smartphone, the high-bandwidth DRAM memory stacks used in high-end computing, as well as in advanced graphics cards. 3D integration allows...

Tessera to Acquire Ziptronix, Inc. for $39 Million

SAN JOSE, CA (August 28) — Tessera Technologies, Inc. announced the acquisition of Ziptronix, Inc. for $39 million in cash. The acquisition expands on Tessera’s existing advanced packaging capabilities by adding a low-temperature wafer bonding technology platform that will accelerate delivery of 2.5D and 3D IC solutions to semiconductor industry...

Low-Temp, Ultra-Fine-Pitch Cu Interconnections for Manufacturable, Solder-free Assembly

A novel copper interconnection technology is being pioneered by Georgia Tech’s Packaging Research Center (GT-PRC) to achieve manufacturable solder-free assembly at low temperatures. By interfacing engineering and process design, the Cu interconnections are shown to meet both thermal cycling and ultra-high current-handling needs. This technology is now being applied to mobile...

2016 3D InCites Awards Winners

Device of the Year Amkor Technologies, Inc: SWIFT SWIFT: uniquely developed to deliver a high yielding, high-performance package with the thinnest profile in the industry. This package can deliver 2um line/space lithography with up to 4 layers of RDL and a very dense network of memory interface vias from bottom...