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Onto’s JetStep® lithography and Firefly® G3 inspection systems offer a powerful solution as the industry pursues glass core panel transition Wilmington, Mass., July 9, 2024 – Onto Innovation Inc. (NYSE: ONTO) today announced Onto Innovation’s glass substrate suite featuring the JetStep® X500 panel-level packaging lithography system with hybrid substrate handling...
While most of us in advanced packaging is familiar with CEA-Leti, CEA-List ( Laboratoire d’Intégration de Systèmes et des technologies) is one of three specialized technological research institutes of CEA specializing in digital systems. Denis Dutoit, of CEA-List, presentation on “Chiplet Partitioning Can Balance Among Performance, Flexibility and Scalability” at...
Until recently, many companies considered diversity a “nice to have.” Companies supported diversity and inclusion because they wanted to be good citizens because it was the right thing to do, and – for some, cynically – because it was good PR. But now research is proving the business case for...
Artificial intelligence and machine learning (AI/ML) can have various applications in smart manufacturing for semiconductor fab, advanced packaging, and electronics manufacturing, and it typically involves several key elements: sensing, connectivity, predicting, and control. As recognized by many industry organizations, smart manufacturing matures through several levels: reactive, preventive, predictive, and autonomous...
ERS electronic, the innovation leader in thermal management solutions for the semiconductor manufacturing industry, is appointing Joshua Zhou as Vice President. Zhou joined the company as Sales and Marketing Director in 2018 when ERS opened its China sales office in Shanghai. Joshua has more than twenty years of experience in...
The Electronic Design Process Symposium – EDPS 2919 – is known in the IC design community as a rather small (50 – 100 participants), but a highly interactive workshop. The 26th edition, hosted again this year by SEMI at its Milpitas headquarters, October 3 -4, 2109 featured both EDPS IC design...
Wafer and panel-level packaging (WLP/PLP) offers technical and business advantages, compared to traditional IC packages. These cost-effective packaging solutions attracted more than 800 industry experts to the International Wafer Level Packaging Conference (IWLPC 2018) in San Jose’s DoubleTree Hotel at the end of October. In case you were wondering, a...
The message remains consistent: following Moore’s Law is no longer economical for most IC designs. A major part of the IC value creation is moving from the die to the IC package. Now advanced packaging technologies and materials enable combining multiple dies with heterogeneous functions as well as high-quality passives...
From the keynotes to the sessions to casual conversation, automotive electronics was a hot topic of discussion at SEMICON Europa 2017. That’s likely because Europe leads the world in automotive OEMs and is home to four of the top 10 semiconductor providers in the automotive industry. With over 22% growth...
When I saw that Dev Gupta, Ph.D, of Advanced Packaging & Systems Technology Laboratories, LLC (APSTL) was presenting at the IMAPS Arizona Chapter luncheon last week, there was no questioning my attendance. Dr. Gupta has been an active participant on 3D InCites, offering regular commentary on posts, so I was...
