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EV Group Brings Revolutionary Layer Transfer Technology to High-volume Manufacturing with EVG®850 NanoCleave™ System

Dec 07, 2023

Infrared laser cleave technology enables ultra-thin-layer transfer from silicon substrates with nanometer precision, revolutionizing 3D integration for advanced packaging and transistor scaling FLORIAN, Austria, December 7, 2023—EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today introduced the EVG®850 NanoCleave™...

The Edge of 3D: 3D SoC VLSI and Si Photonics

Feb 08, 2017

Last week, I posted an executive summary of this year’s European 3D Summit, touching on the highlights and general takeaways based on the closing remarks I delivered at this year’s well-attended event, which took place January 23-25, 2017 at Minatec Campus in Grenoble. In this post, we’ll take a deeper...

ASMC 2016, the Return of MEPTEC Luncheons, and Your May Calendar

May 06, 2016

The Saratoga Springs, NY, horse racing season starts in late July, following a racing tradition that dates to the 1860s. That’s a pretty long run indeed, and it’s one of the things, along with the healing spring waters, successful Revolutionary War battle history, and “summering” by well-to-do Boston and New...

Amkor: SLIM

Jun 22, 2015

Amkor’s SLIM (siliconless integrated module) is a dies-last package technology providing the thinnest possible form factor with the highest level of integration by use of back-end-of-line technology combined with assembly-based fan-out architectures.  It has optimal registration, 3D access to top and bottom side of package and the finest line RDL capability...

SPTS Technologies’ Silicon Etch Tool Chosen for 300mm CMOS Image Sensor Applicatons

Jun 02, 2014

Move to 300mm Strengthens Customer’s Position in the Rapidly Growing CMOS Image Sensor Market Newport, United Kingdom, 29 May, 2014 – SPTS Technologies, a supplier of advanced wafer processing solutions for the global semiconductor industry and related markets, today announced that a leading Chinese wafer level packaging (WLP) supplier to...

2.5D Interposer wafer - TSMC

Motivation for 3D IC and other Key Take-Aways from the IEEE 3D IC Conference

Oct 07, 2013

The IEEE 3D Systems Integration Conference (IEEE 3D IC) is a unique event that is a truly international effort in assembling all those involved in research and commercialization of 3D IC and 3D systems from around the world. Location for the event rotates annually from Munich to Tokyo to San Francisco. This...

Dynaloy: A Formula for Cleans

Aug 21, 2013

It’s hard to believe that inside such a non-descript building set back down a picturesque country lane in (almost) rural Indiana, really cool things are happening. This is the home of Dynaloy, LLC, a subsidiary of Eastman Chemical Company, where innovative chemical formulations are being developed to remove the most...

What 3D Means in eWLB

Nov 14, 2012

Last week (November 6) STATS ChipPAC issued a press release announcing that its advanced eWLB provides a platform for 2.5D and 3D technologies.  In search of further information about this, I found a feature article recently published in Solid State Technology that explained how eWLB can be leveraged for 2.5D and...

Filled vs. conformal vias: the consensus

Oct 06, 2009

Dr. Zhang, I think we have reached a verdict.

Bob Patti wrote in to confirm Anonymous Caller’s statement regarding polymer-filled, copper-lined TSVs, and also provided some additional data to support his comments. I’ve taken the liberty of paraphrasing his comments here:

With the caveat that he...