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ClassOne Technology Ships Follow-on Solstice® S8 Single-Wafer Processing System to Leading Aerospace and Defense Company

May 04, 2023

ClassOne Technology, a leading global provider of advanced electroplating and wet processing tools for microelectronics manufacturing, today announced it has shipped another Solstice® CopperMax™ single-wafer processing system to a leading provider of aerospace and defense solutions. Built on ClassOne’s state-of-the-art, high-throughput Solstice platform, the system will augment the customer’s existing installed...

ACM Research Receives Multiple Purchase Orders for Ultra C wb Wet Bench Tools

Feb 13, 2022

Largest purchase order for wet bench systems in ACM’s history; Wet bench product line expanded to include Ultra-Low-Pressure Dry (ULD) technology FREMONT, Calif., Feb. 13, 2022 (GLOBE NEWSWIRE) — ACM Research, Inc. (ACM) (NASDAQ: ACMR), a leading supplier of wafer processing solutions for semiconductor and advanced wafer-level packaging (WLP) applications,...

YES Receives VertaBond™ Purchase Order from a Tier 1 Memory Manufacturer

Mar 19, 2021

FREMONT, Calif. – Mar 15, 2021 – YES (Yield Engineering Systems, Inc.), a preferred provider of material modification and surface enhancement solutions for the semiconductor, life science and display markets, today announced that a leading memory manufacturer has ordered the YES VertaBond™ system for wafer-to-wafer and die-to-wafer bonding. The new...

EV Group: GEMINI®FB XT Automated Production Fusion Bonding System

Jun 09, 2015

The GEMINI®FB XT fusion wafer bonding platform features up to a 3X improvement in wafer-to-wafer bond alignment accuracy as well as a 50% increase in throughput over the previous industry benchmark platform. These performance breakthroughs clear several key hurdles to the industry’s adoption of 3D-IC/TSV technology. Testimonial According to the...

Executive Viewpoint: Inside a Multi-Project Wafer Program for 3D Integration

Apr 17, 2015

Multi-project wafer (MPW) programs have long been considered an economical way to integrate different IC designs from various teams to produce IC design prototypes and low volumes. Because IC fabrication costs are extremely high, it makes sense to share mask and wafer resources in this way. MPWs were historically used...

Europe in 3D

Europe in 3D: Nordson DAGE Sets Out to Measure the Invisible

Jan 15, 2014

What better place for the Queen of 3D to start out her Europe in 3D tour than a late lunch at the Crown Inn, in Colchester, Essex UK? I arrived in London on Monday afternoon, January 12, and was greeted by 3D InCites’ own Nick Richardson, business development manager (and...

Strong adhesives

Temporary Bond/Debond: Not Ready for 3D TSV Prime TIme

Dec 21, 2012

It’s too bad SUSS MicroTec’s Wilfried Bair was one of the last presenters on Friday at 3D Architecures for Systems in Packaging Symposium (3DASIP), Dec. 14, 2012, because more people should have been present to hear what he had to say. While most presenters focused on successes and future work...

C2W Bonding Approaches: Variations on Theme

Mar 23, 2011

As chip-to-wafer (C2W) stacking has been identified by most technologists as the best approach to 3D stacking for optimum yields and the ability to stack dies of different sizes — especially in memory/logic stacks — a number of approaches have been or are being developed by various collaboratives.  At IMAPS...