Matches for your search: "fan-out wafer level packaging "
I first met Dr. Thomas Fries, Founder, and CEO of FRT, The Art of Metrology in 2016 at SEMI Europe’s 3D Summit in Grenoble. Fries became a big fan of 3D InCites, following us on social media, and sharing our content. Over the next few years, Fries and the team...
You may have noticed a newcomer to the 3D InCites community. But Onto Innovation is not a new company. It is the result of the 2019 merging of equals of two successful process control solutions providers who wanted to expand to serve the semiconductor manufacturing supply chain from end to...
Materials have a major impact on reliability, performance, cost and other key parameters of electronic solutions. SEMI’s recent Strategic Materials Conference (SMC 2019) brought materials suppliers and their customers together to discuss progress made in these areas. They also addressed how to solve the increasingly divergent and complex challenges current...
Rudolph Technologies, Inc. (NYSE: RTEC) today announced the immediate availability of its new JetStep® lithography systems for advanced packaging processes on wafer and panel formats. The JetStep systems incorporate an option for a new, proprietary submicron lens design, as well as up to 25% increased productivity over the previous JetStep...
A new book on 2.5D and 3D integration, written by Riko Radojcic and published by Springer, will soon be available. The book addresses the current status of More-than-Moore system-in-package (SiP) technologies and explores the technical and business tradeoffs for deploying these options in high volume commercial IC products. We’re pleased...
The era of “More than Moore” was alive and well in 2016 as the semiconductor industry witnessed many new developments in advanced packaging. Among these was the production of the first hybrid bonded image sensor, which enables high-performance image processing as well as on-sensor memory to provide faster extraction and...
In addition to attending the panel and plenary sessions at ECTC 2016, which took place May 31-June 3, 2016, I also spent a good deal of time talking to industry suppliers to get updates on their latest accomplishments that will impact the future of advanced semiconductor packaging, including interposer integration...
ST. FLORIAN, Austria – Feb. 5, 2016 – EV Group (EVG), an industry-leading supplier of wafer-bonding, lithography/nanoimprint lithography (NIL), metrology, photoresist coating, cleaning and inspection equipment, today announced its participation in the 3D integration consortium of IRT Nanoelec, which is headed by CEA-Leti. EVG joins Leti, STMicroelectronics and Mentor Graphics...
The semiconductor industry hasn’t adopted 3D ICs as quickly as many in the industry expected. There are some barriers that perhaps have kept the cost/benefit analysis stuck in the ‘scaling’ camp rather than moving it to the ‘3D’ camp. However, many companies are preparing for the move to 2.5D and...
While GLOBALFOUNDRIES and STATS ChipPAC may have it all figured out, there are many who still consider temporary bond/debond (TB/DB) to be an unsolvable challenge that adds unnecessary cost. The solution? Find a way to do away with it altogether. During the 3D IC Forum at SEMICON Singapore, both A*STAR...
