Search Results

Matches for your search: "fan-out wafer level packaging "

Community Member Monthly News – August 2023

News you may not have seen this month from our community members. Along with some upcoming participation to keep an eye on. Onto Innovation announced over $100 Million in orders for systems supporting advanced packaging for AI. Its Dragonfly® G3 sub-micron inspection and metrology system supports production of AI chiplet packages....

advanced packaging growth in AI

TechSearch International, Inc. Examines Advanced Packaging’s Growth in AI

Advanced Packaging’s Growth in AI TechSearch International’s latest analysis examines the demand for packages used in AI. As the industry enters the AI era, successful hardware deployment requires a supply of silicon interposers, or alternatives such as redistribution layer (RDL) structures and advanced laminates, to support high density. With the...

IFTLE 545: Chiplet Definition and Standardization

I wanted this blog to cover the recent whitepaper by Siemens’ EDA division on chiplet model standardization, and it will, but first I need to go over some introductory material on chiplets, and specifically, chiplet definition. Let me explain why. As part of the work that I do with the...

Chiplet Designs and Heterogeneous Integration Packaging

System-on-Chip (SoC) integrates ICs (by reducing the feature size) with different functions such as central processing unit (CPU ), graphic processing unit (GPU ), memory, etc. into a single chip for the system or subsystem. Unfortunately, it is more and more difficult and costly to reduce the feature size (to...

Mercury Systems Selected to Provide Secure Packaging for DoD SHIP program

ANDOVER, Mass., April 19, 2022 (GLOBE NEWSWIRE) — Mercury Systems, Inc. (NASDAQ: MRCY, www.mrcy.com), a leader in trusted, secure mission-critical technologies for aerospace and defense, announced it has been selected to provide trusted and secure advanced packaging for the Office of the Undersecretary of Defense for Research and Engineering’s (OUSD...

IFTLE 509: IEEE 3DIC 2021 – Glass Embedding and 3D Retinal Prosthesis

Finishing up our coverage of the 2021 IEEE 3DIC conference, we take a closer look at glass embedding, 3D stacked packaging for retinal prosthesis, and the chiplet design exchange. Georgia Tech – Glass Embedding Madhavan Swaminathan, who has replaced Rao Tummala as the Director of the GaTech Packaging Research Center...

Additive Manufacturing for 3D Electronic Packaging

Additive manufacturing defines new boundaries for 3D electronic packaging, determined by new exceptional materials, new 3D cavity structures and the everlasting drive for lower cost of manufacturing. Additive manufacturing is a complex process by which products are constructed layer by layer using a 3D-printable set of materials such as photopolymers,...

IC Packaging: An Essential Enabler and Differentiator, Part 2

The Great Miniaturization … SEMI/MEPTEC Conference Nov 10 & 11, continued from Part 1.  Wednesday morning started with a IC packaging session focused on my favorite subject: Multi-die Integration. Trevor Yancey, who recently joined Jan Vardaman at TechSearch International, talked about the IoT and gave an example for how the...

A Solder Bump Expert’s Take on the Expanding World of Advanced Packaging

An interesting take-away from the keynote talk delivered by Brandon Prior, Prismark Partners, at this year’s IMAPS International Device Packaging Conference, held March 11-13 in Fountain Hills, AZ, was the observation that just because new advanced packaging types are being introduced to the market, it doesn’t mean that older ones...

IME's Silicon Photonics

Si Photonics: 3D ASIP’s Pre-game Show

Is Si photonics the vehicle that will finally catapult 2.5D and 3D IC to stardom? While that was the story told during an R&D panel at SEMICON West, it’s not exactly accurate. At this week’s 3D Architectures for Semiconductor Integration and Packaging (3D ASIP) which took place Wednesday, December 11, 2013...