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In Part 4 of my coverage of the IMAPS Onshoring Workshop, we look at how government agency roles impact onshoring microelectronics. Office of Industrial-Based Policy Adele Ratcliff, Director of the Innovation Capability and Modernization Office discussed Manufacturing Capability Expansion and Investment Prioritization (MCEIP). The mission of the Office of Industrial-Based...
FRT MicroProf® PT Automates Measurement to Reduce Processing Costs on Panels up to 600mm x 600mm LIVERMORE, CA – (Globe Newswire – May 31, 2023) – FormFactor, Inc. (NASDAQ:FORM), a leading semiconductor test and measurement supplier, today introduced the FRT MicroProf® PT, a new semiconductor metrology and inspection tool for...
Cadence, ASE Group, and Chung Yuan Christian University (CYCU) announced collaboration on an education and training program to cultivate talent for 3D-IC Design. Cadence collaborates with universities on system packaging education and talent development through the Cadence Academic Network program, which provides students with access to Cadence advanced IC packaging...
System-on-Chip (SoC) integrates ICs (by reducing the feature size) with different functions such as central processing unit (CPU ), graphic processing unit (GPU ), memory, etc. into a single chip for the system or subsystem. Unfortunately, it is more and more difficult and costly to reduce the feature size (to...
TechSearch International’s teardown of the Apple Watch Series 6 GPS+LTE examined 108 board-level packages plus another 17 packages inside modules and found 27% more wafer level packages (WLPs) than in the previous Series 5, including packages in the wireless charger. Apple used more multi-die modules in the new watch. X-ray...
Additive manufacturing defines new boundaries for 3D electronic packaging, determined by new exceptional materials, new 3D cavity structures and the everlasting drive for lower cost of manufacturing. Additive manufacturing is a complex process by which products are constructed layer by layer using a 3D-printable set of materials such as photopolymers,...
Rudolph Technologies, Inc. (NYSE: RTEC) today announced the immediate availability of its new JetStep® lithography systems for advanced packaging processes on wafer and panel formats. The JetStep systems incorporate an option for a new, proprietary submicron lens design, as well as up to 25% increased productivity over the previous JetStep...
A new book on 2.5D and 3D integration, written by Riko Radojcic and published by Springer, will soon be available. The book addresses the current status of More-than-Moore system-in-package (SiP) technologies and explores the technical and business tradeoffs for deploying these options in high volume commercial IC products. We’re pleased...
In addition to attending the panel and plenary sessions at ECTC 2016, which took place May 31-June 3, 2016, I also spent a good deal of time talking to industry suppliers to get updates on their latest accomplishments that will impact the future of advanced semiconductor packaging, including interposer integration...
While GLOBALFOUNDRIES and STATS ChipPAC may have it all figured out, there are many who still consider temporary bond/debond (TB/DB) to be an unsolvable challenge that adds unnecessary cost. The solution? Find a way to do away with it altogether. During the 3D IC Forum at SEMICON Singapore, both A*STAR...
