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Fan-out wafer-level packaging research

Arizona State University and Deca Technologies to Pioneer North America’s First R&D Center for Advanced Fan-Out Wafer-Level Packaging

Mar 19, 2024

Advanced wafer-level packaging advances the next wave of innovation in global chip manufacturing TEMPE, Ariz. – March 19, 2024 – Arizona State University (ASU) and Deca Technologies (Deca), a premier provider of advanced wafer- and panel-level packaging technology, today announced a groundbreaking collaboration to create North America’s first fan-out wafer-level...

IFTLE 500: We’ve Come a Long Way, Baby!

Oct 14, 2021

IFTLE (Insights From the Leading Edge), believe it or not, has reached #500! I hope this message reaches all of you free of COVID and ready to move on in this exciting period for Advanced Microelectronic Packaging. For those of you that have not been on board for the full...

10 Years of Invent, Innovate, Implement at EV Group

Jun 27, 2019

Of all the companies that have supported 3DInCites over the past 10 years, none has been more consistently involved, both as contributor and sponsor, as EV Group. In fact, without EVG’s belief in our mission and their sponsorship the first three years, I doubt 3DInCites would still exist today. Therefore,...

Advanced Packaging Trends, Part I: Solving PR Strip and UBM/RDL Challenges

Feb 27, 2018

Over the years, the semiconductor industry has relentlessly focused on shrinking gate dimensions to drive performance. This focus has now transitioned to the packaging side as customers are shifting from wire bonding to flip chip for use in wafer level packaging (WLP). According to VLSI Research, about 35% of chips...

Panel Level Packaging: One Size Fits All?

Feb 16, 2017

There is an active and robust supply chain currently supporting these wafer sizes in the semiconductor manufacturing industry: 3”; 4”; 6”; 200mm; 300mm; and 330mm. This wide range of substrates is successfully being used today for “sweet-spot’ manufacturing of LED, compound semiconductor, MEMS, trailing-edge CMOS, leading-edge CMOS, and fan-out wafer...

Deca Technologies Receives Major Investment for M-Series™ Fan-out Growth

Sep 01, 2016

TEMPE, Arizona – September 1, 2016 – Deca Technologies, a wafer level electronic interconnect solutions provider to the semiconductor industry, announced today the receipt of an additional $51.5 million investment from a leading electronics company. Combined with the previously announced investment from ASE of $60 million, and following the repurchase...

Fraunhofer IZM Panel Level Packaging Consortium Launches in Berlin

Aug 05, 2016

In the bric-à-brac collection that seems to form my particular set of memories and mental associations, I have at least two old somethings crowded in a Berlin corner that I have been looking after for years, a corner to which I have now recently added something new and exciting. And...

Mobile Sector Dominates the Advanced Packaging Market as IoT Looms on the Horizon

Dec 03, 2015

“Advanced packaging will reach 44% of packaging services and a revenue of US$ 30 billion by 2020,” announces Yole Développement (Yole). Overall, the main advanced packaging market is the mobile sector with end products such as smartphones and tablets. Other high volume applications include servers, PC, game stations, external HDD/USB...

Rudolph Ships JetStep Lithography System for High-Volume Fan-Out Packaging Applications

Feb 06, 2015

Flanders, New Jersey (February 2, 2015)—Rudolph Technologies, Inc. has shipped the JetStep® Advanced Packaging Lithography System to a leading outsourced assembly and test (OSAT) facility. This new customer will use the JetStep W Series for fan-out wafer level packaging (FO-WLP) applications. “The customer was seeking to add capacity for ramp...