Matches for your search: "fan-out wafer level packaging "
As a small U.S. semiconductor packaging company, Mosaic Microsystems is very supportive of the CHIPS Act and looks forward to contributing to the efforts being taken to strengthen the U.S. semiconductor industry. Our business focuses on the use of glass for substrates and interposers, which are critical technologies required by...
EVG®40 NT2 offers breakthrough metrology performance to accelerate implementation of wafer- and die-level hybrid bonding and maskless lithography FLORIAN, Austria, November 15, 2021—EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today unveiled the EVG®40 NT2 automated metrology system, which...
Amkor Technology, a leading provider of semiconductor packaging and test services, has announced that it plans to build a state-of-the-art smart factory in BacNinh, Vietnam. The first phase of the new factory will focus on providing Advanced System in Package (SiP) assembly and test solutions to the world’s leading semiconductor and electronic...
Just like most other events that attract a large number of people, TSMC 2020 events were held online too. While I missed the many friends I normally meet at TSMC events, I was able to follow the powerful messages from TSMC, its Open Innovation Platform (OIP) partners, and satisfied customers...
In the USA, to motivate optimism when things haven’t turned out as expected, we say: “When life gives you lemons, make lemonade!” In other words, take the sour stuff, and find a way to make it sweet. In the MEMS business, we make lemonade all the time. Every fab engineer has...
Ziptronix Inc. today announced that its Direct Bond Interconnect (DBI) hybrid bonding has been implemented by Fermi National Accelerator Laboratory (Fermilab) to improve the performance of high-end 3D sensor arrays, which are used for particle detection in large-scale particle physics and x-ray imaging experiments. This is an example of three-layer...
SEMICON West 2014 brought its usual flurry of supplier announcements on new equipment and process improvements; but there weren’t as many focused on 3D technologies as there have been in past years. This is likely due to the fact that some players are holding off until 3D hits it big...
Customers have asked and suppliers are listening. One sign of progress from last year to this year at SEMICON Singapore’s 3D IC Forum was the number of supplier presentations focused on process improvements that have been developed to lower the 3D IC cost of ownership (CoO). In addition to the...
At IMAPS DPC 2014, which took place March 11-13, 2014, in Fountain Hills, AZ, there were several presentations focused on new developments in cleans for TSVs and Cu bumps for 2.5D and 3D IC processes. Cleans has become increasingly important as bump pitches are reduced and TSVs have higher aspect...
As May rolls right into June, so do the 3D events; or should I say events in which 3D topics are addressed. Indeed, it seems as if 3D is permeating just about everything. From looking at the programs, it’s clear that organizers are struggling with categorizing presentations to fit under...
