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The International Microelectronics Assembly and Packaging Society (IMAPS) will host a one-day Workshop to discuss and promote strategies to improve on-shore packaging and assembly capabilities on October 3, 2022, at the Hynes Convention Center, Boston, Massachusetts. This workshop will be followed by the IMAPS 2022 Symposium, October 3-6 at the...
“We believe that materials science changes the world,” declared Indium Corporation’s Andy Mackie during our recent sit-down together at IMAPS 2019 in Boston, MA. Even though I am a chemical engineer myself, and not a materials scientist, Andy Mackie, Ph.D., senior product manager, is reaching the choir, one engineer to...
Santa Clara’s Convention Center was home to DesignCon 2019 from January 29-31, 2019. This conference is well known for showing printed circuit board (PCB) and system designers the latest technology advances, enabling higher performance and lower power and lower cost solutions. Bootcamps, tutorials, keynotes, and many in-depth technical sessions offered...
Growth for high-density fan-out wafer level packages (FO-WLPs) continues unabated, with Apple’s continued use of TSMC’s InFO process in its smartphone application processors. Standard FO-WLP has experienced a few bumps on the road to higher volumes this year. Problems with Qualcomm’s steep ramp of FO-WLP for its PMICs and RF...
Part one of a five-part series. Over the past few years, there has been a significant shift from PCs and notebooks to smartphones and tablets as drivers of advanced packaging innovation. In an industry segment that has grown accustomed to a multitude of package varieties, we believe we are now...
CIRCL-AP™ is a cluster tool with multiple modules, covering all-surface inspection, metrology and review at high throughput for efficient advanced wafer level packaging (AWLP) process control. The CIRCL-AP provides production-proven, high sensitivity monitoring capability for multiple AWLP applications including 2.5D/3D integration, wafer-level chip scale packaging and fan-out wafer-level packaging. Testimonial...
Flanders, New Jersey (March 10, 2015)—Rudolph Technologies, Inc. (NYSE: RTEC) announced today that a major outsourced assembly and test (OSAT) manufacturer has selected the JetStep® Advanced Packaging Lithography System for evaluation. The tool, which ships this week, will be used to develop copper (Cu) pillar bumping and through silicon via...
If, as we heard at last week’s 3D IC Forum at SEMICON Singapore, that technology challenges and cost are no longer keeping 3D ICs from volume manufacturing, and indeed the key players are ready to go, then what’s it going to take to get this 3D IC adoption party started?...
NANIUM S.A. has introduced an improved dielectric material and process solution for its fan-out wafer-level packaging (FOWLP) technology, embedded wafer-level ball grid array (eWLB). These improvements increase eWLB’s reliability, thereby extending the existing technology platform into more demanding markets and applications including medical devices, aerospace and automotive, among others. The...
There’s been lots of news lately about the transition to 450mm wafers, and I’m wondering, is it only me, or are there others who are amazed at how little mention there is on its impact in the assembly and packaging world. It’s like the front-end has forgotten that the back-end...
