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IPC Expo – Defense Electronics Supplier Roundtable The 16th Defense Electronics Supplier Roundtable at the recent IPC APEX EXPO in San Diego (Jan 2023) contained some interesting presentations that serve to add to our recent examination of the many government agencies currently looking to support Advanced Packaging. Craig Herndon, DoD...
Advanced packaging technology enables continued performance scaling across applications, and it is clear that the coming generations of mobile and edge computing, cloud computing, and distributed high-performance computing will require heterogeneous chip integration technologies. To accommodate demanding performance and scaling requirements while also meeting stringent technical specifications for speed, bandwidth,...
While we are all conjuring visions of what advanced packaging and in fact transistors themselves will look like in the coming decades, political maneuvering is occurring that just might have an equal impact in reshaping our industry in the future. No need to rehash to the story of how chip...
Artificial Intelligence (AI) is driving the development of 3D TSV and heterogeneous integration technologies. With its new 3D TSV & 2.5D business update report, Yole Développement (Yole), part of Yole Group of Companies investigates the advanced packaging industry and takes a closer look at the AI impact on this market....
With nary a farewell glance in the rearview mirror at the terrain successfully covered over the decades during which we followed the ITRS’ Guide Michelin; the new Heterogeneous Integration Roadmap gives us eyes on what comes next. It looks from here-and-now all the way to a horizon that extends, like...
The Internet of Things (IoT) or as Cisco calls it, the Internet of Everything, has been the theme du jour for almost every semiconductor-related industry event in the past year, and going forward for 2015. The IoT hype continues, as many see the opportunity in this global trend to connect people,...
Over the past year… The amount of 2.5/3D articles published has gained momentum. Some articles discuss when HVM will be achieved for this complex packaging, others discuss costs from chip to system levels, how to evaluate options, design and verify, etc. All articles are based on facts gleaned from various articles, presentations...
We’ve heard it expressed many times whenever there’s a new interconnect technology vying for adoption: manufacturers will select the best performing option at the lowest cost to do the job. However, as performance requirements reach previously un-anticipated levels, pitch requirements become tighter, and density requirements become higher, the job of...
Invensas Corporation, a wholly owned subsidiary of Tessera Technologies, Inc. , announced today that it has acquired the patent assets of ALLVIA, Inc. In addition, Invensas has entered into a two-year collaborative partnership with ALLVIA to further develop technology and intellectual property (IP) in the 3-dimensional integrated circuit (3D-IC) packaging...
The SEMICON West 2010 show at Moscone Center in San Francisco, from July 13-15, will present a full program of exhibitions, presentations, meetings, and workshops focused on 3D interconnects (3D IC) for integrated circuits.
