Search Results

Matches for your search: "fan-out wafer level packaging "

Veeco Announces Agreement With IBM to Explore WaferStorm Wet Processing System for Advanced Packaging Applications

Veeco’s WaferStorm® Wet Processing System to Enable Essential Cleaning Processes in Hybrid Bonding for IBM Veeco Instruments Inc. (NASDAQ: VECO) today announced that IBM selected the WaferStorm® Wet Processing System for advanced packaging applications and has entered into a joint development agreement to explore advanced packaging applications using multiple wet processing technologies from...

Thermal Test Chips (TTCs) for Advanced Semiconductor Packaging

Thermal management is becoming an ever more critical challenge for semiconductor devices, as the functional density and power density increase – especially with advanced packaging. Thermal test chips (TTC) are a critical enabler for developing thermal management solutions for high-power semiconductor devices. How are TTCs Fabricated? TTCs made from silicon...

How to Achieve Advanced IC Packaging Verification and Signoff

To satisfy industry demand for continued increases in electronic functions per unit area, foundries and outsourced assembly and test (OSAT) companies have shifted their emphasis to driving advanced IC packaging innovation. One path is to integrate, in the package, smaller, heterogeneous, or homogeneous, high-yield chips or chiplets: functional building blocks...

IFTLE 519: SIA Responds to the CHIPS For America Act

IFTLE thought it might be of value to take a look at the Semiconductor Industry Association’s (SIA) response to the Dept of Commerce’s request for information (RFI) on “Incentives, Infrastructure, and Research and Development Needs to Support a Strong Domestic Semiconductor Industry”, which is being used to plan for and...

An EDA Perspective on Today’s Advanced Packaging

In my alliance management roles at electronic design automation (EDA) companies, I arranged many presentations to convey the benefits of EDA tools to IDMs, fabless IC vendors, and wafer foundries. Some of our EDA marketing people passionately presented their products’ strengths and demonstrated in-depth EDA knowledge. However, speaking fast, with...

A Perfect Storm is Brewing for Complex Packaging in 2016

If I had not attended the 2015 3D ASIP conference, my outlook for 2016 would have been less upbeat for complex packaging (2.5/3D). But this conference showed that companies and their development organizations are NOT solely looking towards FinFETS and sub 20nm silicon process nodes to meet their integration, power,...