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ERS electronic Releases Fully Automatic Luminex Machines with PhotoThermal Debonding and Wafer Cleaning

May 29, 2024

ERS electronic, the industry leader in thermal management solutions for semiconductor manufacturing, is announcing two new fully automatic machines from its Luminex product line. The machines, LUM300A1 and LUM300A2, are designed to handle 300 mm substrates, and both feature ERS’s state-of-the-art PhotoThermal debonding technology that offers unparalleled flexibility, cost-effectiveness, and...

Discover Wafer Universe: Your Premier Source for Standardized Wafers

Feb 15, 2024

Plan Optik AG is excited to introduce Wafer Universe, crafted to meet the urgent needs for standardized wafers with a focus on streamlining procurement and ensuring rapid delivery. Product Offerings: Borofloat33® Glass Wafers: Ideal for a wide range of applications, including Wafer-Level-Packaging (WLP) of MEMS components by anodic bonding. Quartz Glass...

Plasma Dicing Enables Challenging Applications Including D2W Hybrid Bonding

Jun 14, 2023

Plasma dicing offers an optimized approach to die singulation as chips get smaller, thinner, and more complex. As semiconductor content proliferates across networks and devices, there’s a growing demand for increased semiconductor functionality packed into smaller, thinner, and stronger packages. Heterogenous integration is essential to this effort and die-to-wafer (D2W)...

How MTP Technology Improves 3D Heterogeneous Integration

Feb 22, 2022

High-performance computing, communications, mobile, automotive, industrial, medical, and defense systems increasingly require 3D heterogeneous integration of many diverse components to improve their performance and functionality. These diverse components include high electron mobility transistors (HEMTs), heterojunction bipolar transistors (HBTs), power transistors, gate drivers, photonics, sensors, hardware assurance devices, capacitors, inductors, filters,...

IFTLE 457: Hybrid Bonding Comes of Age

Aug 03, 2020

I first started covering Ziptronix and its hybrid bonding technology back in 2007 when I was writing Perspectives from the Leading Edge (PFTLE) for Semiconductor International (SI). I’d give you the references, but SI went belly up in 2010 and I learned my first lesson about the NON-archival nature of...

More Tech Notes from 3D ASIP 2012

Jan 08, 2013

Oh yes, where was I before the holidays took over and hijacked my life for two weeks?  I’ll bet you thought I was done reporting on 3D ASIP, but wait – there’s more! Point/Counterpoint on Thin Wafer Handling I already reported on Wilfried Bair’s (Suss MicroTec’s perspective on temporary/ debond...

ACM Research team at 3D ASIP 2012.

ACM Research: New Kid on the 3D Block

Dec 13, 2012

Yesterday at the pre-conference symposium for 3D Architectures for Semiconductor Integration and Packaging (3D ASIP), I was fortunate to get an up close and personal tutorial preview by David Wang, CEO of ACM Research, on the tool manufacturer’s latest process solution for two critical points in the TSV fabrication process. The...