Matches for your search: "fan-out wafer level packaging "
For decades, Moore’s Law has been a way to measure performance gains in the semiconductor industry, but the ability to double the density of transistors on a chip every two years is becoming increasingly challenging. With scaling reaching its limit, manufacturers are looking to advanced packaging innovations to extend the...
Morris Chang, retired long-time CEO of TSMC, was recently quoted in the Taipai Times as saying “US efforts to increase onshore manufacturing of semiconductors is wasteful and an expensive exercise in futility due to a lack of manufacturing talent and high costs”. Chang made the remarks in an interview with...
Gallium arsenide (GaAs) is used in the manufacture of devices such as microwave frequency integrated circuits, monolithic microwave integrated circuits, infrared light-emitting diodes, laser diodes, solar cells, and optical windows. Handling and processing thin GaAs wafers is usually enabled by using a sapphire wafer as a carrier, which is expensive...
Building integrated circuits (ICs) in the third dimension has been taking place since trench capacitors were introduced for DRAM in the 1980s. The trend continued with the introduction of the damascene process and copper, which quickly grew the back end of the line metallization from 2-3 layers into today’s interconnect...
IME – Hybrid Bonding Studies Singapore’s Institute of Microelectronics – IME / AStar – was certainly the most prolific presenter at the conference. In their presentation, “Wafer Level Fine-Pitch Hybrid Bonding: Challenges and Remedies”, they review in great detail processing issues prevalent in hybrid bonding. Wafer-level fine-pitch hybrid bonding, first...
As technology rapidly moves forward, the reduction of device and chip size is playing an important role in implementing as many chips and sensors in the smallest space. For this reason, the thickness reduction of semiconductor wafers is necessary. Thin semiconductor wafers (thickness around 50-100 µm) are flexible and fragile....
Having spent the last 30 years working in semiconductor manufacturing, it is both exciting and unsettling to see renewed political interest in the revitalization of this industry in the United States. Gone are the days of ‘It doesn’t make any difference whether a country makes computer chips or potato chips!’...
“Growing photolithography equipment markets in advanced packaging, MEMS and LEDs are attracting new players; but they have to navigate complex roadmaps …” announces Yole Développement (Yole). The “More than Moore” market research and strategy consulting company confirms its leadership in the silicon manufacturing industry with its new technology & market...
Flanders, New Jersey (July 14, 2015)—Rudolph Technologies, Inc. (NYSE: RTEC) and DISCO Corporation of Tokyo, Japan, announce a collaborative partnership to deliver leading-edge hardware and software solutions to optimize the wafer saw unit processes. These comprehensive solutions will enable their customers to consistently improve the quality and productivity of their...
With a focus on providing cost-effective and reliable solutions to accelerate manufacturing readiness of 3D technology options, SEMATECH experts reported new breakthroughs in wafer bonding at the 7th Annual Device Packaging Conference (DPC) on March 7-10 in Scottsdale, AZ. Technologists from SEMATECH’s 3D Interconnect program have demonstrated a novel die-to-wafer...
