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The Big Squeeze – Why OSATs Need to Work Smarter

Analysts are projecting strong growth in advanced packaging, with a compound annual growth rate (CAGR) through 2026 approaching 7% across the segment; much higher for certain high-end technologies, including 3D stacking, embedded die, and fan-out. Outsourced assembly and test (OSAT) firms, which package finished die manufactured by independent device manufacturers...

ECTC 2020 Keynote: Moore’s Law 2.0 Brought to You by HIT

If TSMC’s Doug Yu wrote a rap song, the title would be “HIT IT!”  He’s been on a roll lately, evangelizing heterogeneous integration technology (HIT) as the new path going forward for the semiconductor industry. In fact, the ECTC 2020 keynote is Yu’s third keynote presentation at key h this...

IFTLE 446: 2.5/3D Inspection; Embedded Chip Tech; Wide Bandgap Semi Roadmap

Let’s look at a few more presentations from the SEMI 3D & Systems Summit which was held in late January in Dresden. KLA showed this interesting schematic of where inspection was necessary for high-density 2.5/3D packaging. Embedded Chip Technology AT&S gave an interesting presentation on “Heterogeneous Module Integration using Embedded...

Highlights From MEPTEC’s 2018 Heterogeneous Integration Symposium

The Microelectronics Packaging and Test Engineering Council (MEPTEC) held its annual heterogeneous integration symposium at SEMI’s headquarters in Milpitas, CA on December 5, 2018. Many manufacturing and test, as well as electronic design automation (EDA) and IC design experts, got together to present and discuss how to integrate heterogeneous functions...

SEMICON West 2016: Update from the Semiconductor Suppliers

Every year at SEMICON West, in addition to taking in keynotes and technology sessions, I like to catch up with semiconductor suppliers to find out about any significant news, their latest offerings and how they are enabling next-generation manufacturing. Here are this year’s highlights. UnitySC One of the big stories...

ECTC 2015 Supplier Update

While Herb Reiter dove deep into the technology sessions at ECTC 2015, I spent most of my time picking the brains of suppliers who have introduced products targeting advanced wafer level packaging and 3D ICs. Overall, I’ve noticed efforts are becoming really targeted, and are focused on remaining challenges like thermal management, improving...

French Institutes IRT Nanoelec and CMP Team up to Offer World’s First Service for Post-process 3D Technologies on Multi-Project-Wafer

GRENOBLE, France – March 5, 2015 – IRT Nanoelec, an R&D consortium focused on ICT using micro- and nanoelectronics, and CMP, which provides prototyping and low-volume production of ICs and MEMS, are launching a platform for multi-project-wafer, post-process 3D integration (3D-MPW). The new and disruptive 3D configurations and assemblies created by...

Soitec Unleashes the Power of Three

A walk across the impressive Bernin, France campus that is home to two of Soitec Group’s three divisions takes you past three production-level fab facilities – aptly named Bernin 1, Bernin 2, and Bernin 3, plus a development facility. The company’s three-stage business model encompasses innovation, licensing, and production...

2016 3D InCites Awards Winners

Device of the Year Amkor Technologies, Inc: SWIFT SWIFT: uniquely developed to deliver a high yielding, high-performance package with the thinnest profile in the industry. This package can deliver 2um line/space lithography with up to 4 layers of RDL and a very dense network of memory interface vias from bottom...