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chiplet interconnect technology

Chiplet Interconnect Technology: Piecing Together the Next Generation of Chips

Bridging the gap: innovations in chiplet interconnect technology Chiplet interconnects begin with small chips – or chiplets – with a well-defined function that can be incorporated with other chiplets into a single package or system Dense interconnections between chiplets ensure fast, high-bandwidth electrical connections. This article discusses both interposer and...

Talking With Trymax About Innovative Plasma-Based Equipment

This interview with Trymax Semiconductor’s Peter Dijkstra, Chief Commercial Officer (CCO), and Karsten Arts, Process Engineer first appeared in Atomic Limits as part of a series of posts about companies within the atomic scale processing industry. The goal of the series was to provide information about the kind of products...

73rd ECTC: New Format, New Venue, Amazing Experience!

Preparation for the 73rd ECTC started one year ago and was strongly supported by over 250 experts from 15 countries, members of 10 technical committees. The technical committees critically reviewed 618 submitted abstracts from industry (56.1%) and academia (43.9%), resulting in 369 technical papers. The papers, organized in 41 sessions,...

IFTLE 529: More Hybrid Bonding from ECTC 2022

Continuing our look at key Hybrid Bonding (HB) papers at the recent ECTC 2022 in San Diego, CA. Applied Materials Hybrid bonding requires a lot of front-end processing tools, thus you can expect Applied Materials (AMAT) to be an entrant in this technology. In its paper “A Holistic Development Platform...

ML/AI in Semiconductor Packaging and Electronics Manufacturing

As the semiconductor packaging technology evolves in the “More than Moore” era, many advanced processes have presented challenges in manufacturing. Often, challenges in precision die bonding, for example, have led to trade-offs in yield, throughput, and ultimately manufacturing cost. Precision alignment has become one of the key capabilities for several...

Opportunities for 2.5D and 3D Cost Reduction

A little over a year ago, I wrote a Knowledge Portal entry about the cost of 3D ICs. Here I am again to tackle the issue of 2.5D and 3D cost reduction from a slightly different angle. This entry is based on what SavanSys presented at IMAPS Device Packaging 2016....

Thinned wafer image, courtesy of imec

Interview with imec’s Ludo Deferm: Packaging Design Kits and Debond Solutions

For me, SEMICON West involves a careful balance of attending sessions, keynotes and panels, combined with one-on-one interviews with thought leaders in 3D ICs, as well as manufacturing suppliers who have the onerous task of developing, promoting, and selling the next great solution for 2.5D and 3D IC manufacturing. Over...

EV Group Celebrates Strong Growth and New Manufacturing Process Solutions at SEMICON West 2013

Demand For Flexible, High-Volume Manufacturing Solutions in 3D-IC/Advanced Packaging, MEMS, Power Device and Compound Semiconductor Markets Drive Growth SEMICON WEST, San Francisco, July 9, 2013— EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it has achieved...

Brewer Science and EV Group Announce Agreement on ZoneBOND™ Technology

Enabling Commercialization of Groundbreaking Temporary Bonding and Debonding Technology ROLLA, MO, USA and st. florian, AUSTRIA, October 20, 2011 – Brewer Science, Inc., a global leading innovator and manufacturer of specialty materials, process solutions, and equipment for the microelectronics industry, and EV Group (EVG), a leading supplier of wafer bonding...