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High-density build-up substrates

IFTLE 564: IMAPS Reshoring Conference Part 1: Focus on Chiplets

The week of July 10th IMAPS held its now annual reshoring conference jointly with the IPC. The General Chair of the meeting was Darren Crum, Office of the Undersecretary of Defense for Research and Engineering – Advanced Packaging Lead and the Technical Chair was Brandon Hamilton, Program Manager for Microelectronics...

OnShoring Workshop

IFTLE 559: A Complete Look at “Onshoring” coming to IMAPS

Readers of IFTLE are aware that we have been spending significant time during the past two years describing the US government’s attempt to reshore advanced microelectronic packaging and detailing the onshoring programs they have created. If one message has come through loud and clear from our readers it is that...

Amkor Advanced Packaging Enables the Car of the Future

TEMPE, Ariz.–Jun. 13, 2023– Amkor Technology, Inc. (Nasdaq: AMKR), a leading provider of semiconductor packaging and test services and the #1 automotive OSAT, is innovating advanced packaging to enable the car of the future. The evolution of the enhanced automotive experience has been dramatic over the past few years—a rise...

A Retrospective: A Successful 9th ESTC 2022

The Electronics System-Integration Technology Conference (ESTC) is the premier international event in the field of electronics packaging and system integration in Europe. The conference takes place every two years and is the IEEE EPS flagship conference in Europe, organized by IEEE EPS Region 8 (EMEA) Chapter in association with IMAPS...

ASE Introduces VIPack™ to Help Transform Packaging Solution Enablement

SUNNYVALE, Calif., June 1st, 2022 –Advanced Semiconductor Engineering, Inc. (ASE), a member of ASE Technology Holding Co., Ltd. (NYSE:ASX, TAIEX: 3711), today introduced VIPack™, an advanced packaging platform designed to enable vertically integrated package solutions.  VIPack™ represents ASE’s next generation of 3D heterogeneous integration architecture that extends design rules and...

Update on the Heterogenous Roadmap and the CHIPs Act

Years ago, when I was just a young pup in the industry, my manager asked me to attend a meeting in San Jose, California in 1997, where I participated in helping to define one of the early road maps for semiconductor technology, The early version I participated in was sponsored...

IFTLE 506: Tyndall Packaging for Integrated Photonics; TSMC/Sony Joint Venture

Continuing our look at the 2021 IMAPS International Symposium, let’s take a deeper look at the integrated photonics keynote presentation by Tyndall Institute. Integrated Photonics at Tyndall Institute Peter O’Brien discussed “Packaging Technologies for Integrated Photonics”. Tyndall Institute is part of Univ College Cork Ireland. They offer prototyping platforms and...

IFTLE 470: More on TSMC’s SoIC Hybrid Bonding and Intel’s Woes

More on TSMC’s SoIC Hybrid Bonding Technology Nikkei Asia announced that TSMC is working with Google and AMD to develop its SoIC hybrid bonding packaging technology. Google plans to use the SoIC chips for autonomous driving systems and other applications. AMD is reportedly eager to take advantage of chip stacking...

Notes from the FOA Packaging and Test Group

The Packaging and Test Group of the Fab Owners Association, (Cupertino, CA) held its first official meeting on February 4th. This was just one of the meetings held as part of the third annual FOA Collaborative Forum in Santa Clara, CA. The fourteen inaugural FOA packaging and test group (FOA-PT) members heard...

The 2014 European 3D TSV Summit: Get Ready for the Domino Effect

I just boarded my flight home after attending the 2014 European 3D TSV Summit. Three days, 332 attendees from 21 countries, 24 presentations, 3 keynote speakers, 2 panel discussions, several face-to-face interviews and lots of side conversation all about 3D TSVS being Application Ready leads to a good deal of...