Search Results

Matches for your search: "fan-out wafer level packaging "

SkyWater Enters License Agreement with Xperi for Hybrid Bonding Technology

Hybrid bonding capability strongly complements SkyWater’s developing portfolio of heterogeneous integration solutions including silicon interposer and fan-out packaging KISSIMMEE, Fla. and SAN JOSE, Calif. – May 12, 2022 – SkyWater Technology (NASDAQ: SKYT), the trusted technology realization partner, and Adeia, the newly launched brand for the IP licensing business of Xperi Holding Corporation (NASDAQ: XPER)...

3D: The El Dorado of Heterogeneous Integration

From the cloud to edge computing, the quest for ever-greater power efficiency remains researchers’ top priority. From high-end niche to mass-market applications, the best cost-to-performance tradeoff is key to providing a competitive advantage. While  Moore’s Law has helped meet the performance required in terms of data transfer and power efficiency...

IFTLE 443: Controlling Warpage and Placement Error for FOWLP

In the Jan/Feb issue of ChipScale Review, there were two interesting articles on fan-out wafer-level packaging (FO-WLP) entitled “Eliminating Warpage for FOWLP during Debonding” by ERS Electronic GmbH and “Overcoming FOPLP Die Placement Error” by Onto Innovation …lets take a closer look. Eliminating Warpage for FOWLP during Debonding As we...

Welcome to a New Era of Predictive Yield Process Control for Advanced Packaging

In April 2016, Fogale Nanotech Group acquired the assets of Altatech Semiconductor from Soitec in order to combine the metrology offerings of Fogale Nanotech Semicon with Altatech’s unique 2D and 3D inspection capabilities. The idea was to create a powerhouse of process control for emerging advanced packaging processes for next-generation...

Intercepting IC Products with a Disruptive Technology Option

Much has been written about the challenges that corporations face – especially established corporations – in adapting to a disruptive technology and the associated paradigm shifts. Most of the tomes on the subject focus on corporate management strategies. My intent is to discuss these challenges from a technology point of view...

Measuring The Invisible: An Update on X-ray Metrology

One year ago, I visited Nordson DAGE at its R&D center in Colchester, to learn about the company’s latest foray into X-ray metrology at the production level with the launch of the XM8000. Rather than just using X-ray for inspection, this tool also analyzes the data to allow for full...

Understanding Heterogeneous 3D Integration

“How is heterogeneous 3D integration defined?” There are certainly different understandings in the microelectronics community regarding the definition of heterogenous 3D integration. In a very general definition, it is defined as the 3D integration of different devices such as a CMOS processor and a memory, for example. A more limiting specification would...

At Fraunhofer IZM-ASSID, It’s All Silicon, All the Time

One of 60 research institutes that make up Germany’s Fraunhofer Gesellschaft, the Fraunhofer Institute for Reliability and Microintegration IZM is known worldwide for its work in the realm of microelectronic packaging and system integration. The center ASSID (which stands for All Silicon System Integration Dresden) was established as a division...

2021 3D InCites Awards Winner Circle

The 2021 3D InCites Awards program recognized industry-wide contributions in the development of heterogeneous integration and 3D technologies.  We expanded our scope of coverage, adding a special focus on sustainable manufacturing efforts, as well as diversity equity and inclusion (DEI) with two special award categories. Like every other awards event in the...