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January Member News: Technology Innovation, Strategic partnerships, Expansion and More

January Member News celebrates major developments in semiconductor technology, strategic partnerships, industry expansions, and workforce growth. Companies introduced cutting-edge packaging, process control, and inspection solutions, while various acquisitions strengthened the U.S. semiconductor supply chain. There were various new hiring opportunities across the industry, upcoming conferences, and notable achievements. Innovation and...

The Evolution of Interconnects in Microelectronics Packaging

Semiconductor packaging is a complex and evolving field, involving multiple disciplines. As a microelectronics packaging engineer, I focus on the “interconnect thread” from the chip to the system (Figure 1). To me, packaging is about interconnectivity (essentially). The primary function of packaging is to provide the interconnection from the IC...

Figure 4 – ESTC: Steffen Kröhnert, President & Founder of ESPAT-Consulting and 3D InCites Representative in Europe talked in the Special Session on EU Chips Act and IPCEI ME/CT about the future of Packaging in Europe

European Semiconductor Packaging Week

The European semiconductor packaging community, together with its international colleagues, supply chain partners, customers and guests met for a full week fully dedicated to Semiconductor Packaging, Assembly and Test from September 9-13, 2024, at Mercure Hotel MOA Berlin and with it depicted the largest Packaging event in Europe in 2024....

Interconnectology at IMAPS 2024

Leaning Into Interconnectology – Musings from IMAPS Symposium 2024

Call me crazy, but after spending three days at the 2024 International Microelectronics and Packaging Society (IMAPS) Symposium in Boston learning about the latest industry trends and technology advancements, I think it’s time for the entire advanced packaging world to fully adopt the concepts of “Interconnectology” and “Interconnectologist”. The inspiration...

IFTLE 539: IMAPS On-Shore Packaging & Assembly Workshop; TSMC 3DFabric Alliance

As we mentioned in IFTLE 537, IMAPS held the Onshoring: Packaging and Assembly Workshop prior to the traditional IMAPS fall symposium. Let’s take a look at what we learned from some of those key presentations. And then we’ll look at an important announcement by TSMC about its 3DFabric Alliance. Intel...

ESTC 2022 Member Company Preview

Chaired by 3D InCites Community member Steffen Kröhnert of ESPAT Consulting, the Electronics System-Integration Technology Conferences (ESTC) series is a premier venue for academics and industry to present and discuss the latest developments in assembly and interconnection technology and new applications. This year, the event is being held in Sibiu,...

ClassOne Technology Announces New Surface Preparation Technologies that Extend the Solstice® Single-Wafer Platform

Longtime customer and leading VCSEL provider TRUMPF cites the value of Solstice’s key SP capabilities, performance, and footprint ClassOne Technology, a leading global provider of advanced electroplating and wet processing tools for microelectronics manufacturing, today announced it has expanded its flagship Solstice® automated single-wafer platform with a suite of surface...

ACM Research Ships Its First 300mm, High-Temp Single-Wafer SPM Tool for Advanced Logic, DRAM and 3D-NAND Semiconductor Manufacturing

ACM Research, Inc. a leading supplier of wafer processing solutions for semiconductor and advanced wafer-level packaging (WLP) applications, today announced it has shipped its first 300mm single-wafer Sulfuric Peroxide Mixture systems (Single-Wafer SPM tool) for wet clean and etch processes in advanced logic, DRAM and 3D-NAND integrated circuit manufacturing. ACM’s new...

IFTLE 437: Packaging Trends for Artificial Intelligence

As it has in recent years, SEMICON Europa 2019  featured a dedicated Advanced Packaging Conference. In this and my next post, we will look at some of the key presentations. In Jan Vardaman’s TechSearch presentation “Packaging Trends for Artificial Intelligence (AI)” she noted that the following package types would be...

Heterogeneous Integration Versus Dimensional Scaling; One Year In (Part 2)

In the first part of this series, I covered the perspectives of dimensional scaling vs. heterogeneous integration based on discussions during SEMICON West 2017. For part two, I spoke with equipment and material suppliers who serve either (or in some cases, both) the front- and back-ends of the semiconductor manufacturing...