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The 56th International Symposium on Microelectronics organized by the International Microelectronics Assembly and Packaging Society (IMAPS) is just around the corner. This year’s symposium will feature five technical tracks, professional development courses and an interactive poster session. The technical program spans three days of sessions with emphasis on SiP/Design/Manufacturing Optimization; Wafer Level/Panel...
Technical papers to highlight the breakthrough capabilities of EVG’s LITHOSCALE® maskless lithography solution and OmniSpray® resist coating technology for “More than Moore” applications EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that new developments in heterogeneous integration...
“Although the inflated excitement has started to plunge after few years of hype, Fan-Out technologies are still very well established in low-end and high-end applications”, asserts Favier Shoo, Technology & Market Analyst at Yole Développement (Yole). “It has proven benefits in terms of form factor with no IC substrates, performances...
Technical papers and interactive poster to highlight the breakthrough capabilities of EVG’s ComBond® high-vacuum bonding system and low-temp laser debonding solution for “More than Moore” applications EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that new...
As the semiconductor industry shifts focus from CMOS scaling to heterogeneous integration, the importance of surface preparation and wafer cleans during semiconductor device manufacturing is migrating from front-end wafer processing to back-end wafer level packaging processes. This, due to a combination of high-reliability applications, such as autonomous vehicles, 5G, artificial...
Part 1 of this advanced packaging (AP) article series focused on solving photoresist (PR) strip and under bump metallization (UBM) / redistribution layer (RDL) challenges. This article looks at AP trends from a lithography standpoint and proposes solutions to associated lithography challenges. The need for advanced packaging solutions is greater...
To the best of my recollection (and a quick search through 3D InCites’ archives) the panel level packaging (PLP) hoopla first hit the conference circuit in 2015 at the International Wafer Level Packaging Conference (IWLPC), when Jan Vardaman made it the topic of a panel discussion, and told a cautionary...
2016 was a turning point for fan-out (FO) packaging. With Apple’s entrance and its subsequent decision to package its A10 APE in TSMC’s fan-out solution, the market changed. Thus advanced packaging leaders decided large investments for the development of fan-out platforms, impacting the related equipment and materials market. “Indeed, both...
It’s been a nearly a month since the 2017 IMAPS Device Packaging Conference and Global Business Council, so I’ve had plenty of time to mull over the many presentations and conversations focused on advanced packaging trends. The winds of change are blowing ever so slightly from year’s past. You had...
California’s Pasadena is well known for the New Year Rose Parade and the Rose Bowl. There is no doubt: It takes commitment and organizational talent to make these events successful for 100+ years, and encourage every contributor to prepare and execute successful events every year. Last week’s International Microelectronics Assembly...
