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SUNNYVALE, Calif., May 31, 2023 – Advanced Semiconductor Engineering, Inc. (ASE), a member of ASE Technology Holding Co., Ltd. (NYSE: ASX, TAIEX: 3711), today announced its latest Fan-Out-Chip-on-Substrate-Bridge (FOCoS-Bridge) technology breakthrough, achieved through qualifying a large 70mm x 78mm package that incorporates two ASICs and eight High Bandwidth Memory (HBM)...
First system qualified at power semiconductor manufacturer in China FREMONT, Calif., Nov. 11, 2022 (GLOBE NEWSWIRE) — ACM Research, Inc. (ACM) (NASDAQ: ACMR), a leading supplier of wafer processing solutions for semiconductor and advanced wafer-level packaging (WLP) applications, today announced that it has expanded its Ultra C pr product offering to include...
It goes without saying that 2021 was a monumental year for the semiconductor industry, and especially heterogeneous integration. Our industry hit mainstream media like never before, and suddenly the whole world understands the importance of semiconductors in our everyday lives. At 3D InCites, we spent 2021 covering the topics that...
Intel in Talks to Acquire GlobalFoundries Trustworthy sources such as the Wall Street Journal are reporting that Intel is in talks to acquire GlobalFoundries (GF). They report that the deal could value GF at around $30 billion. Talks appear to be directly between Intel and the Abu Dhabi government (which...
Continuing our look at presentations at the 2020 IWLPC, one of the themes of the conference was panel level processing. Canon Doug Shelton of Canon discussed “Submicron Lithography Enabling Panel Based Heterogeneous Integration”. While panel level processing (PLP) is efficient for large packages, processing equipment changes are required to process...
Anyone whose anyone with a hand in the evolution of wafer level packaging will be in attendance or exhibiting at the 16th Annual International Wafer-Level Packaging Conference (IWLPC) and Tabletop Exhibition next week. 3D InCites will be there and we’re excited to engage and learn from the industry’s most respected...
The Winter Games are over and the athletes returned home, and the SEMICON Korea 2018 teams from February have their sights on SEMICON China this month after all that snow-in-Seoul settled, but I still have a few more comments about the Electropackage System and Interconnect Product technical session SEMI organized...
I am convinced that increasing device complexity, higher quality requirements (e.g. automotive and medical), as well as the need for faster production ramp-ups, will force our industry to pay even more attention to design-in quality, expand self-test, even add redundancy to control logic and interconnects. In addition, wafer-probe and final...
Is Moore’s Law dead or not? It depends on your perspective. Last week at ECTC 2016, Rozalia Beica, Dow Electronic Materials, gathered a prestigious group of senior executives from the world’s leading microelectronics research institutes to discuss Life after Moore’s Law. Panelists included Marie-Noelle Semeria, CEA-Leti; Dim Lee Kwong, IME;...
Fan-out wafer level packaging (FO-WLP) is a disruptive technology that will have a significant impact on the electronics industry in the coming years. WLP has seen strong growth, especially in the mobile devices, because it provides a low-profile package that meets the requirements of many smartphone makers. Billions of WLPs...
