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SUNNYVALE, Calif., May 31, 2023 – Advanced Semiconductor Engineering, Inc. (ASE), a member of ASE Technology Holding Co., Ltd. (NYSE: ASX, TAIEX: 3711), today announced its latest Fan-Out-Chip-on-Substrate-Bridge (FOCoS-Bridge) technology breakthrough, achieved through qualifying a large 70mm x 78mm package that incorporates two ASICs and eight High Bandwidth Memory (HBM)...
IR laser cleave technology enables nanometer-precision layer transfer through silicon, eliminating glass substrates for advanced packaging and enabling thin-layer 3D stacking EV Group (EVG), a leading provider of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today introduced NanoCleave™, a revolutionary layer release technology for silicon...
It goes without saying that 2021 was a monumental year for the semiconductor industry, and especially heterogeneous integration. Our industry hit mainstream media like never before, and suddenly the whole world understands the importance of semiconductors in our everyday lives. At 3D InCites, we spent 2021 covering the topics that...
Intel in Talks to Acquire GlobalFoundries Trustworthy sources such as the Wall Street Journal are reporting that Intel is in talks to acquire GlobalFoundries (GF). They report that the deal could value GF at around $30 billion. Talks appear to be directly between Intel and the Abu Dhabi government (which...
A Technology Chasm Until recently, the world of IC fabrication was neatly divided into the distinct stages of front-end and back-end processing, with a large chasm separating them for both process complexity and economic value. The front end has been focused on increased processing or computing power and achieves this...
Continuing our look at presentations at the 2020 IWLPC, one of the themes of the conference was panel level processing. Canon Doug Shelton of Canon discussed “Submicron Lithography Enabling Panel Based Heterogeneous Integration”. While panel level processing (PLP) is efficient for large packages, processing equipment changes are required to process...
I am convinced that increasing device complexity, higher quality requirements (e.g. automotive and medical), as well as the need for faster production ramp-ups, will force our industry to pay even more attention to design-in quality, expand self-test, even add redundancy to control logic and interconnects. In addition, wafer-probe and final...
Fan-out wafer level packaging (FO-WLP) is a disruptive technology that will have a significant impact on the electronics industry in the coming years. WLP has seen strong growth, especially in the mobile devices, because it provides a low-profile package that meets the requirements of many smartphone makers. Billions of WLPs...
Newport, United Kingdom, 22 May, 2014 – SPTS Technologies, a supplier of advanced wafer processing solutions for the global semiconductor industry and related markets, today announced the launch of its Rapier XE system for 300mm wafer silicon etch processing. The new module offers significant advantages over competing systems as well...
CoatsClean™ combines process, equipment and formulation technology to deliver innovative, low cost-of-ownership approach to single-wafer photoresist and residue removal ST. FLORIAN, Austria and INDIANAPOLIS, Ind., June 17, 2013—EV Group (EVG), a leading supplier of wafer bonding and lithography equipment, and Dynaloy, LLC, an international manufacturer of chemicals for the electronics...
