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(2nm semiconductor manufacturing foundries) UMC started the semiconductor manufacturing foundry business in 1980, followed a few years later by TSMC. You could say the rest is history. TSMC has come to dominate the foundry industry for wafer processing and advanced packaging. TSMC has a 62% market share in the second...
It is my honor to announce the winners of the 2022 3D InCites Awards. With 51 nominees in 11 categories, we had more participation than ever, and the competition was fierce! Thank you to this year’s platinum sponsors, ASE Group, EV Group and KLA; our gold sponsors, Evatec and YES, and...
One of the things that are missing from virtual events is the candid conversations we engage in when we meet up with industry colleagues in the halls and cocktail receptions at in-person events. In a way, that’s the tone we’re trying to capture in the conversations we have on the...
Vaibhav Trivedi of Yole Développement gave an outlook for the advanced packaging market with a focus on 3DIC. The semiconductor market declined 12% YoY to reach $412B in 2019. In 2020 the market grew slightly despite the pandemic to about $439B. Yole expects 2021 to be another slight growth year (Figure...
During in-person and on-line meetings, I often discuss with friends the impressive progress our industry has made in the last 50 years following Moore’s Law. In 1981, when I joined the industry, on-die feature sizes were 3 microns (= 3000 nm). Today, some IC designers already rely on 3 nm...
Temporary wafer bonding is widely employed in semiconductor device fabrication and in semiconductor device packaging applications, particularly now that changes in the Z dimension are calling for thinner and thinner silicon devices, and thinner and thinner packaged devices. This means that wafers and singulated die must be supported through parts...
At the latest MEPTEC Luncheon, held February 5, 2020, and hosted by SEMI at its Milpitas HQ, Google’s Dr. Preeti S. Chauhan, Technical Program Manager for Data Center Quality, presented her perspectives on the benefits and challenges of advanced IC packaging technologies. Considering that Alphabet, Google’s parent company, controls about...
There are several different fan-out wafer-level packaging (FOWLP) technologies that are currently in high-volume production. The traditional fan-out (FO) technology as initially developed by Motorola and Infineon was a face down, die-first technology that has been in volume production for low-end baseband, PMIC, Codec, Wi-Fi, RF kind of applications since...
There’s no doubt about it. This is a good time to be in the microelectronics and packaging sector of the semiconductor industry. With exciting markets like artificial intelligence (AI), 5G, and the internet of things (IoT) technologies moving from ideas to implementation, this previously tired segment of the semiconductor industry...
Enhanced wafer alignment metrology capability coupled with market-leading GEMINI® FB system creates closed-loop fusion wafer bonding solution to enable high-density TSV devices St. Florian, Austria, July 8, 2013 — EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today introduced...
