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Both events to take place March 3-7, 2025 in Phoenix, Arizona Device Packaging Conference – The event with the most advanced packaging content this winter The 21st Annual IMAPS Device Packaging Conference (DPC 2025) will be held March 3-6, 2025, at the Sheraton Grand at Wild Horse Pass in Phoenix,...
(2nm semiconductor manufacturing foundries) UMC started the semiconductor manufacturing foundry business in 1980, followed a few years later by TSMC. You could say the rest is history. TSMC has come to dominate the foundry industry for wafer processing and advanced packaging. TSMC has a 62% market share in the second...
Company expansion driven by market growth in 3D/heterogeneous integration fueling strong demand for EVG hybrid bonding and other leading process solutions FLORIAN, Austria, November 28, 2023—EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it has completed construction...
One of the things that are missing from virtual events is the candid conversations we engage in when we meet up with industry colleagues in the halls and cocktail receptions at in-person events. In a way, that’s the tone we’re trying to capture in the conversations we have on the...
Vaibhav Trivedi of Yole Développement gave an outlook for the advanced packaging market with a focus on 3DIC. The semiconductor market declined 12% YoY to reach $412B in 2019. In 2020 the market grew slightly despite the pandemic to about $439B. Yole expects 2021 to be another slight growth year (Figure...
A Technology Chasm Until recently, the world of IC fabrication was neatly divided into the distinct stages of front-end and back-end processing, with a large chasm separating them for both process complexity and economic value. The front end has been focused on increased processing or computing power and achieves this...
On Definitions and Buzzwords Long-time readers of IFTLE know that I’m sensitive about nomenclature and buzzwords. For instance: “nanotechnology” and “internet of things” are buzz words that are being used way too loosely and have little meaning. I’m OK with 2.5D because I was there when it was first uttered...
During in-person and on-line meetings, I often discuss with friends the impressive progress our industry has made in the last 50 years following Moore’s Law. In 1981, when I joined the industry, on-die feature sizes were 3 microns (= 3000 nm). Today, some IC designers already rely on 3 nm...
Temporary wafer bonding is widely employed in semiconductor device fabrication and in semiconductor device packaging applications, particularly now that changes in the Z dimension are calling for thinner and thinner silicon devices, and thinner and thinner packaged devices. This means that wafers and singulated die must be supported through parts...
Enhanced wafer alignment metrology capability coupled with market-leading GEMINI® FB system creates closed-loop fusion wafer bonding solution to enable high-density TSV devices St. Florian, Austria, July 8, 2013 — EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today introduced...
