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IMAPS 2021 Community Member Preview

The IMAPS 2021 program is set to be knowledge-packed, offering materials both in person and on demand, including  keynote presentations from top experts, professional development courses, numerous technical sessions and over a dozen posters. Our 3D InCites community members are playing a large role in dispersing this knowledge through their...

EV Group Unveils Hybrid Die-to-Wafer Bonding Activation Solution to Speed Up Deployment of 3D Heterogeneous Integration

EVG®320 D2W die preparation and activation system provides seamless integration with third-party die bonders; completes EVG’s equipment portfolio for end-to-end hybrid bonding for 3D/Heterogeneous Integration EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology, and semiconductor markets, today introduced the EVG®320 D2W die...

IFTLE 428: Panel Level Processing: We’ve Come A Long Way Baby!

It was in 1992 when Ted Tessier and I, in our paper, “Overview of MCM Technologies: MCM-D”, at the IMAPS Symposium in San Francisco, drew the analogy to the evolving LCD industry. “The LCD industry had spawned the development of a whole new class of large format, high-throughput thin-film processing...

Wally Rhines Discusses the Importance of EDA and Design at IWLPC 2018

At this year’s International Wafer-level Packaging Conference, almost 1000 semiconductor experts from all parts of the supply chain gathered at the DoubleTree Hotel in San Jose from October 23 to 25. Among them were also several electronic design automation (EDA) experts who discussed how to streamline die-package-board co-design. They explained...

Advanced Substrates; Key Enabler of Future Advanced Packaging Solutions

“Advanced substrates are the key interconnect component of advanced packaging architectures,” comments Andrej Ivankovic, Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing at Yole Développement (Yole). Indeed advanced substrates are critical in enabling future products and markets. To answer to technology evolution and market needs, Yole’s advanced packaging team...

3D ASIP 2015: 3D Manufacturing Processes from the Early Days to the Present

For the first time since the 3D Architectures for Semiconductor Integration and Packaging (3DASIP) Conference was established, the organizing committee decided to acknowledge the work of two researchers who were instrumental in developing the core processes that enabled 3D TSV development. In a brief ceremony, Dr. Phil Garrou presented 3DIC Pioneer...

Rudolph Technologies receives orders from STATS ChipPAC for eWLB Inspection

Rudolph Technologies, Inc. announced it has received multiple orders for its NSX® and WaferScanner™ Inspection Systems from STATS ChipPAC Ltd. The systems will be used for high-throughput inspection during each step of the eWLB (embedded wafer-level ball grid array) process. Shipments commenced in 4Q09 and will continue through 1Q10.