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At last week’s International Microelectronics and Packaging Society’s Device Packaging Conference, (IMAPS DPC 2024) we didn’t need TrendForce to tell us that advanced packaging is the hottest technology in the semiconductor industry. We just needed to look at the record attendance of more than 700 advanced packaging enthusiasts who turned...
With AMD’s announcement of its Elevated Fanout Bridge (EFB) GPU package, the embedded bridge for fan-out (FO) on substrate is in the spotlight. With assembly of EFB at an OSAT, the development highlights the ability of OSATs to have a strong play in the high-performance packaging market. TechSearch International discusses...
Malicious Embedded Chips in our Mother Boards? Early October brought a report from Bloomberg that I have heard was the top tech story circulating at the DoD and DARPA. For years, articles about counterfeit chips, and our reliance on Asian-made chips – where they could be modified in ways to pass...
Part 1 of my 3D ASIP blog covered the five keynotes presented at 3D ASIP 2017. Part 2 focuses on more than 20 informative presentations, where focused experts gave an in-depth view of new and/or improved technologies for 3DIC-related advanced packaging. Before we address these, allow me a one-sentence recap...
The semiconductor industry is acting quite young for its age. And that’s just not me saying it; over and over again during SEMICON West 2017 I heard some variation of the phrase “We’re just getting started.” What was it that accounted for the upbeat and buoyant mood at SEMICON West...
Françoise promised in her recent blog that my ECTC blog would follow shortly. Finally, after attending DAC in Austin as well as the iMAPS’ SiP Conference in California’s Wine Country and shortly before attending Semicon West in San Francisco, I found some time to report what I saw and learned...
I have to admit, after attending this week’s SEMICON West 2016, I’m feeling a little smug. Why? Because after years of waiting in the shadows for its day in the sun, advanced packaging is finally getting its turn, thanks to the push towards heterogeneous integration, which relies on advanced packaging...
Flanders, New Jersey (September 1, 2015) — Rudolph Technologies, Inc. (NYSE: RTEC) announced the widespread adoption and success of its newest macro defect inspection tool, the NSX®330 Series. The NSX 330 Series provides high-speed macro defect inspection and 2D and 3D metrology for advanced packaging applications, which are being developed to...
Last year, I did an analysis that included the topic of wafer-to-wafer bonding. Specifically, it was a comparison of the three variations available when stacking wafers and/or die—wafer-to-wafer (W2W), die-to-wafer (D2W), and die-to-die (D2D). The goal of that project was to build cost models for W2W and D2W (with the...
New NSX Metrology Series includes application-specific configurations to address unique metrology requirements for wafer level packaging, 2.5D and 3DIC Rudolph Technologies, Inc. (NASDAQ: RTEC), a leading provider of process characterization, photolithography equipment and software for the semiconductor, FPD, LED and solar industries, today released three new application-specific configurations of its...
