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At last week’s International Microelectronics and Packaging Society’s Device Packaging Conference, (IMAPS DPC 2024) we didn’t need TrendForce to tell us that advanced packaging is the hottest technology in the semiconductor industry. We just needed to look at the record attendance of more than 700 advanced packaging enthusiasts who turned...
IMAPS 2022 Continued… This year’s IMAPS Symposium in Boston drew 925 attendees and featured: 20 technical and poster sessions 11 professional development courses Keynotes from MIT, Bosch, NXP, Reliance and ADI Panel session on mm wave packaging As always it was a great atmosphere to see old friends and make...
With each passing year, emerging growth application areas such as Automotive, Cloud Computing, Industrial Automation, and Telecom (5G) Infrastructure are garnering more attention. Although the application segments are different, there is a commonality in how voltage conversion and power distribution are achieved at the system level. System demands are becoming...
In a recent IMAPS webinar, John Park (Figure 1), product management director of Cadence Design Systems, gave a tutorial entitled “This Is Not Your Father’s Advanced Semiconductor Packaging…an EDA Perspective”. Herb Reiter reviewed it here. While a lot of the technical detail that he shared was probably beyond the older...
EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today unveiled the new SmartView® NT3 aligner, which is available on the company’s industry benchmark GEMINI® FB XT integrated fusion bonding system for high-volume manufacturing (HVM) applications. Developed specifically for fusion...
MEPTEC lunches, now known as the MEPTEC / IMAPS / SEMI Semiconductor Speaker Series Luncheon sponsored by Chip Scale Review, are on again in Silicon Valley. At the most recent lunch in mid-March 2018, I was pleased to see that it was none other than Rich Rice, VP Business Development,...
Part 1 of my 3D ASIP blog covered the five keynotes presented at 3D ASIP 2017. Part 2 focuses on more than 20 informative presentations, where focused experts gave an in-depth view of new and/or improved technologies for 3DIC-related advanced packaging. Before we address these, allow me a one-sentence recap...
Fan-out wafer level packaging (FOWLP) technology is an increasingly popular solution for obtaining high levels of device integration with a greater number of I/O contacts, at a lower cost. With FOWLP today we have the ability to embed heterogeneous devices including baseband processors, RF transceivers, and power management ICs in...
I have to admit, after attending this week’s SEMICON West 2016, I’m feeling a little smug. Why? Because after years of waiting in the shadows for its day in the sun, advanced packaging is finally getting its turn, thanks to the push towards heterogeneous integration, which relies on advanced packaging...
Flanders, New Jersey (September 1, 2015) — Rudolph Technologies, Inc. (NYSE: RTEC) announced the widespread adoption and success of its newest macro defect inspection tool, the NSX®330 Series. The NSX 330 Series provides high-speed macro defect inspection and 2D and 3D metrology for advanced packaging applications, which are being developed to...
