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The Boston Consultant Group (BCG) recently took a look at the impact that advanced packaging is having on the microelectronics chip ecosystem. Let’s take a look at some of the points that they make. Advanced packaging is replacing simple “scaling”, which had been the traditional way to achieve advancements in...
More than a few years ago, somewhere around 28nm, my working group was discussing the potential demise of “Moore’s Law”. The industry and international technology roadmap committee were struggling with hi-k metal gates, strain, FinFETs, and of course how lithography could keep shrinking. The designing and manufacturing of a system...
SK Hynix Advanced Packaging Ki-ill Moon, head of Packaging Technology Development at SK Hynix recently wrote an article for EE Times entitled “ The Value of Semiconductor Packaging Technology in the Era of Heterogeneous Integration” that is certainly worth taking a closer look at. The theme of the article is...
The annual IEEE Electronics Packaging Technology Conference (EPTC 2020 – Asia’s equivalent to the ECTC) took place virtually in December, instead of in Singapore as originally planned. With most of the world’s packaging being done in Asia, it is always a great source of interesting advanced packaging presentations. Let’s take...
The semiconductor industry is at a turning point. The slowdown in CMOS scaling, coupled with escalating costs, has prompted the industry to rely on integrated circuit (IC) packaging to extend the benefits of the More-than-Moore era. Thus, the advanced packaging industry has entered its most successful period, boosted by widespread...
Sitting in the bus on the way back from Grenoble to Airport Lyon, I am reflecting the last two days during which we honored Gilles Poupon, the Advanced Packaging “Pope” of CEA Leti. Upon his retirement at the end of November 2017, somehow an era ends. I have known Gilles...
Fan-out wafer-level packaging (FOWLP) is an emerging type of high-density advanced packaging (HDAP) technology in the semiconductor industry that is rapidly gaining popularity in the market. But what exactly is FOWLP? Why do we need it? How do we take advantage of it? What limitations still need to be overcome?...
Consumer electronics designers continue to demand thinner and lighter packages while devices increase in functional complexity. The Fan-Out Wafer Level Package (FOWLP) platform has been gaining momentum with the advantages it offers in electrical performance, assembly process efficiency and low geometric profile. Different approaches of Package-on-Package (PoP) stacking in FOWLP...
You might recall that a few year’s back (October 2013, to be precise), 3D InCites’ regular blogger, Paul Werbaneth, had the opportunity to interview Dongkai Shangguan, then CEO of the National Center for Advanced Packaging (NCAP) in Wuxi, China, which he helped found along with nine investors. They talked about...
Repeat Order for IQ Aligner Further Solidifies EVG’s Position as Leading Microlens Molding Solutions Provider for Wafer-level Camera Applications St. Florian, AUSTRIA, March 27, 2012 – EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that Himax Technologies,...
