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As the power density increases for semiconductor devices, thermal management is becoming an ever more critical challenge for reliability and performance, for high-performance computing, AI, data center, power electronics, and other applications. Heat dissipation is often a great concern as the junction temperature rises with an increased power density, which...
Perhaps more than at any point in the history of the semiconductor industry, the manufacturing and design supply chain is in the world’s spotlight, thanks largely to the recent period of international trade tension. The national agendas of governments representing the world’s largest economies are prioritizing IP protection along with...
This week we continue our look presentations from SEMICON Europa’s Advanced Packaging Conference. Intel’s Reliability Test Beth Keser’s group at Intel Germany discussed their “product-on-board” reliability test for 0.3mm WLCSPs. The existing JEDEC/IPC board-level methodology tests are fine for traditional packaging solutions for non-extreme low K dielectric (ELK) fab nodes....
Last week, I had a whirlwind trip to Grenoble, France: 3 days, 2 summits, and 1 supercool paragliding festival, Coupe Icare, on the side – all filled with “Aha!” moments. Ironically, the paragliding event I attended on Saturday drove home the point of the most stand-out talk from the week:...
Like the previous 10 years, RTI International held the 11th 3D-IC focused conference in early December. Instead of the usual two and a half days, this year it spanned 3 days, because it also offered a 4-hour session about 3D design challenges and solutions available from foundries, EDA and IP...
The technologies are ready, the target high volume applications for 3D IC manufacturing have been identified, and now it’s about convincing system architects there’s more to gain from designing in 2.5D and 3D ICs than there is to lose. At last week’s European 3D TSV Summit (January 21-22), two European...
