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Key advanced packaging technology influencers came out in force to discuss the status of EDA tools for 2.5D/3D IC package design at the recent User to User (U2U 2019) Conference, organized by Mentor, A Siemens’ Business (Mentor) and hosted at the Santa Clara Marriott. Presenters from Wave Computing, ARM, Amkor,...
Yann Guillou, Applied Materials I cannot believe 3D InCites is already turning 10! As wise people say, time flies! Taking a step back, I have to admit a lot of progress has been made since my first attendance as a young engineer to the EMC 3D workshops back in 2008....
Samsung at the Leading Edge At the recent Samsung Tech Day, the company unveiled several new technologies: Their 7nm extreme ultraviolet (EUV) process node from Samsung’s foundry business SmartSSD – a field programmable gate array (FPGA) SSD, that will offer accelerated data processing and the ability to bypass server CPU limits...
The competition was fierce and the stakes high for the annual MSEC 2018 technology showcase. which took place during the MEMS and Sensors Executive Congress, in Napa CA. The winner gets a free table next year and is expected to share their progress. After a rapid-fire session of presentations and...
Yes. You read that right. It is my great pleasure to announce that Dr. Phil Garrou is joining 3D InCites as contributing editor and as a member of our esteemed technical advisory board. Like me, you may have noticed a pause in Phil’s missives on all things advanced packaging. While...
It used to be that people thought about metrology for front-end process control and inspection for advanced packaging. As wafer level packaging (WLP) and heterogeneous integration (HI) approaches became more advanced, metrology processes began creeping into back-end process control, where measurement becomes trickier and more diversified. As part of the...
Artificial Intelligence (AI) combines both hardware and software. TechSearch International’s latest analysis explains the packages behind AI applications. AI accelerators found in datacenters require high-density packages to support logic plus high bandwidth memory (HBM). Many silicon interposer designs are in mass production and Intel’s EMIB is also used. Package-on-package (PoP) is used...
PLAINVIEW, New York, July 9, 2018 – Veeco Instruments Inc. (Nasdaq: VECO) today announced that one of the world’s leading memory chip manufacturers has ordered multiple AP300™ lithography systems to support the fast-growing demand for DRAM with copper (Cu) pillars. The company selected the Veeco tools for their versatility in...
Despite a valiant effort by the ECTC committee to integrate design topics into this year’s agenda, the number of empty seats spoke volumes: Including two plenary sessions on design-focused topics was one thing; getting packaging and process engineers to attend was quite another. While I attended IC Package Co-Design for...
May 1st is a holiday in many countries, but not in the U.S. and not for TSMC. A very professional TSMC team and many of its Open Innovation partners demonstrated recent accomplishments to a gathering of more than 2000 attendees at the 2018 TSMC Technology Symposium at the Santa Clara...
