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Onto’s JetStep® lithography and Firefly® G3 inspection systems offer a powerful solution as the industry pursues glass core panel transition Wilmington, Mass., July 9, 2024 – Onto Innovation Inc. (NYSE: ONTO) today announced Onto Innovation’s glass substrate suite featuring the JetStep® X500 panel-level packaging lithography system with hybrid substrate handling...
While most of us in advanced packaging is familiar with CEA-Leti, CEA-List ( Laboratoire d’Intégration de Systèmes et des technologies) is one of three specialized technological research institutes of CEA specializing in digital systems. Denis Dutoit, of CEA-List, presentation on “Chiplet Partitioning Can Balance Among Performance, Flexibility and Scalability” at...
Until recently, many companies considered diversity a “nice to have.” Companies supported diversity and inclusion because they wanted to be good citizens because it was the right thing to do, and – for some, cynically – because it was good PR. But now research is proving the business case for...
SUSS MicroTec, leading supplier of equipment and process solutions for the semiconductor industry, announced today a far-reaching collaboration agreement with BRIDG, a not-for-profit, public-private partnership focused on production process technologies, advanced system integration, and 200mm microelectronics fabrication advancing next-generation nanoscale technology. This partnership puts an unprecedented array of SUSS MicroTec...
The Electronic Design Process Symposium – EDPS 2919 – is known in the IC design community as a rather small (50 – 100 participants), but a highly interactive workshop. The 26th edition, hosted again this year by SEMI at its Milpitas headquarters, October 3 -4, 2109 featured both EDPS IC design...
SEMICON West and the Electronic System (ES) Design West were, for the first time, co-located at the Moscone Center in San Francisco, from July 9 to 11, 2019. In addition to most keynotes, I reported about here, This blog talks about some in-depth technical presentations on test and the progress...
The message remains consistent: following Moore’s Law is no longer economical for most IC designs. A major part of the IC value creation is moving from the die to the IC package. Now advanced packaging technologies and materials enable combining multiple dies with heterogeneous functions as well as high-quality passives...
From the keynotes to the sessions to casual conversation, automotive electronics was a hot topic of discussion at SEMICON Europa 2017. That’s likely because Europe leads the world in automotive OEMs and is home to four of the top 10 semiconductor providers in the automotive industry. With over 22% growth...
Ever since 3D transistors (aka FinFETS or Intel’s Tri Gate) 3D NAND, and monolithic 3D IC processes joined the family of 3D integration technology possibilities, we’ve been careful to define them separately on 3D InCites. Some people have wondered if one will displace the other, or if these technologies would...
When I saw that Dev Gupta, Ph.D, of Advanced Packaging & Systems Technology Laboratories, LLC (APSTL) was presenting at the IMAPS Arizona Chapter luncheon last week, there was no questioning my attendance. Dr. Gupta has been an active participant on 3D InCites, offering regular commentary on posts, so I was...
