Adoption of Generative AI is growing every day. There are a growing number of silicon providers coming to the market with chipset solutions for training of AI models. Most of these solutions today are a combination of ASICs/GPUs and large stacks of HBMs, all packaged together. Training for these models typically requires a large dataset that undergoes billions of iterations between ASIC/GPU and Memory. Having ASIC/GPU very close to Memory in a package using 2.5D or 3D construction, improves the performance of the solution.
Along with GPU/ASIC, HBM memory stack is a key building block of AI solutions. There could be as many as 8 to12 stacks of HBMs in an AI solution. This webinar investigates the complexities of manufacturing a high quality, reliable HBM stack that meets the performance and technology requirements of today’s AI chipsets.
Industry Analyst, Dean Freeman, will set the stage with a presentation on the current HBM market, and the predictions for the HBM Roadmap. Micron’s Bret Street will update us on HBM technology trends. Zia Karim, YES, will wrap up the discussion with a look at processes and technologies/tools in development to support next generation HBM.
Register here for Building Advanced HBM Stacks for AI Chipsets
Moderated by: Françoise von Trapp
Françoise von Trapp is known throughout the semiconductor and microelectronics industries as the “Queen of 3D” for founding 3D InCites and influencing the course of semiconductor device packaging technologies. As Editorial Director of 3D InCites, she represents the community as an industry podcaster and blogger, covering symposia and conferences, participating in trade shows, and moderating panels and webinars. Before founding 3D InCites, Françoise was Managing Editor of Advanced Packaging Magazine and a contributor to Chip Scale Review.
Speakers:
Dean Freeman
Dean W. Freeman, Chief Analyst at FTMA and Kiterocket Insights, is a technology advisor and a twice-monthly contributor to 3D InCites. He covers heterogeneous integration and sustainability topics as they pertain to the greater semiconductor industry. Dean has over 40 years of life experience in the semiconductor manufacturing and materials space, where he has had experience in nearly every sector of the semiconductor manufacturing process. He has worked both in the fab and for semiconductor equipment manufacturing companies. Prior to joining Kiterocket, Dean was a research VP for Gartner tracking semiconductor manufacturing, process technology, and multiple aspects of the internet of things. He has also worked at FSI, Watkins Johnson, Lam Research, and Texas Instruments. Dean has 9 process and equipment patents and has written multiple articles in various trade and technical journals. He holds a BS in Chemistry and Earth Science and an MS in Physical Chemistry.
Dr. Zia Karim
Zia Karim, an IEEE Sr. Member, is currently Sr. Vice President and Chief Technology Officer (CTO) at YES (Yield Engineering Systems, Inc.), a leading supplier of semiconductor equipment for backend Advanced Packaging processes. Dr. Karim was previously Vice President of Business Development and Technology at AIXTRON/Genus (acquisitions) where he worked for over 15 years. Dr. Karim also held senior management positions at Applied Materials and Novellus, after starting his career at Sharp Microelectronics in 1994.
Bret Street
Bret Street has over three decades of semiconductor packaging experience. He currently holds over 165 issued U.S. patents. He currently serves as Senior Director of Advanced Packaging Technology Development at Micron Technology Inc. in Taiwan. His team focuses on advanced packaging solutions to enable current and future Micron products like Micron’s industry-leading HBM3e and future HBM/Heterogeneous-enabled products. Over his career, Bret has served in technical leadership roles across Assembly, Test, Probe, Product Engineering, and Advanced Package Technology Development.
