R&D and Collaboration

Latest Posts - Page 4

CMP/CMC/MOSIS partner to introduce a 3D-IC process

Jun 22, 2010 · By Francoise von Trapp · 3D In-Depth

CMP/CMC/MOSIS announced a Grenoble-France based partnership for a 3D-IC multi-project wafer (MPW) service based on Tezzaron’s SuperContact technology and...

CEA-Leti and Docea Power to Combine Expertise on 3D Integration, Thermal and Low-power Design

Jun 15, 2010 · By Francoise von Trapp · 3D In-Depth

French research insitute, CEA-Leti and Docea Power, developers of software for power and thermal analysis at the architectural level,...

CEA-Leti and SPTS to Collaborate On Next-Generation TSV Development

Jun 10, 2010 · By Francoise von Trapp · 3D In-Depth

CEA-Leti and SPP Process Technology Systems (SPTS) have agreed to develop advanced 300mm through-silicon via (TSV) 3D-IC processes at CEA-Leti’s...

Leti and R3Logic collaborate to develop 3D design methodologies

Jan 21, 2010 · By Francoise von Trapp · 3D In-Depth

Global research center, Leti, located in Grenoble France,...

3D R&D Round-up: MIT Lincoln Labs works on SOI

Jan 14, 2010 · By Francoise von Trapp · 3D Event Coverage

At MIT Lincoln Labs (MITLL), R&D processes developing 3D chips using silicon-on-insulator (SOI) wafers is the sole focus. As Phil...

Inside CEA-Leti’s 3D Toolbox

Aug 07, 2009 · By Francoise von Trapp · Devices

Grenoble-based research institute CEA-Leti’s progress is fueled by a single mission: create innovation and transfer it to industry. The goal...

R&D and Collaboration

Executive Viewpoint: Inside a Multi-Project Wafer Program for 3D Integration

Breakthroughs in 3D Chip Technology Lead to Cooling With Microfluidics and 3D Printing

Combining Technology Platforms and Integrating Complex Materials for New Applications