Unlocking the Mystery of X-Ray Imaging for Electronics and Semiconductor Inspection
Apr 23, 2025 · By Excillum · 3D In-Depth, Test and Inspection
Design View all
Multi Physics Analysis of 3D Integrated Circuits
3D integration is becoming a valuable alternative to the ongoing, yet challenging, transistor scaling known as Moore’s Law. This is especially true for semiconductor products that are becoming limited by single die designs (e.g., in terms of form factor, size, and technology node). Homogenous 2.5D-IC approaches help bring about the...
Taking 3D IC Heterogeneous Integration Mainstream
By Tony Mastroianni and Todd Burkholder, Siemens DIS Over the last several years, chiplet-based heterogeneous package integration has emerged as a promising alternative to traditional monolithic package solutions; the so-called homogenous SoC design. 3D IC heterogeneous integration is a system approach, wherein what typically would be implemented as an SoC...
Devices View all
How AiP Technology Helps Enable 5G and More
For 5G smartphones and other millimeter-wave (mmWave) applications, antenna integration, either through antenna-in-package (AiP) or antenna-on-package (AoP) technologies, simplifies the challenges associated with designing products that operate at these high frequencies. A variety of AiP/AoP design methodologies provide the required form, fit, and function for these applications and can include...
System-on-Chip Disintegration is Underway
We have known for some time that with scaling coming to an end the industry would need to find another way to continue moving forward. One of the options is known as SoC disintegration, which is when a system-on-chip (SoC) is disintegrated into its functional parts and then connect these...
Latest Posts - Page 25
EV Group Introduces Industry’s First Fully Automated Wafer Bonding System for HB-LED Manufacturing
EVG560HBL Significantly Increases Throughput for Volume HB-LED Production
SPTS Begins 2010 with Solid Q1 Shipments of US$40M
SPP Process Technology Systems Ltd. (SPTS), announced shipments of US$40 million during the first quarter...Rudolph Technologies receives orders from STATS ChipPAC for eWLB Inspection
Rudolph Technologies, Inc. announced it has received multiple orders for its NSX® and WaferScanner™ Inspection Systems from STATS ChipPAC Ltd....SPP Process Technology Systems (SPTS) Celebrates One Year Anniversary
SPP Process Technology Systems (SPTS), a subsidiary of Sumitomo Precision Products Co., Ltd. (SPP), celebrates one year since it began...3D Integration Research, SEMATECH Style
SEMATECH’s story is one that is truly built upon the essence of collaboration. SEMATECH is not a traditional research center. ...IMAPS 3D Panel Presents United Front
Keith Cooper, Technology and Development, SET North America reports from 2010 IMAPS International , where he attended the 3D Panel,...3D R&D Round-up: Part 1: RTI International
At last month’s 3D Architectures for Semiconductor Integration and Packaging Conference, coordinated by RTI International, three government-funded research institutes...
R&D Round-up Part 2: CEA-Leti rolls out TSV and Non-TSV Demonstrators
Reporting progress for CEA-Léti was 3D program manager Mark...Atrenta and CEA-Leti Sign a Multi-Year Collaboration Agreement
Atrenta Inc., provider of Early Design Closure® solutions that improve design efficiency throughout the IC design flow, has signed a...
