The Role of Chiplets in Redefining Semiconductor Design
Dec 05, 2024 · By Cadence · 3D In-Depth, Design
Latest Posts - Page 2
Executive Interview: Si2 Aims to Boost Confidence in Designing 3D ICs
There’s no doubt left in the minds of semiconductor device manufacturers that the processes required to build interposer-based and 3D...
3D By Design: A Blog By and For the 3D Design Community
Earlier this year, I published an open letter to chip and system-level designers regarding 3D integration, suggesting they consider 3D...
TSV MEOL Process Flow for Mobile 3D IC Stacking
Moore’s law is approaching physical limitations of CMOS scaling, and three dimensional (3D) integration technologies have been proposed as solutions....
E-System Design: Sphinx 3D Path Finder (“3DPF”) V3.0
The Sphinx 3D Path Finder (3DPF) is an exploration tool enabling fast test case creation and analysis for silicon and...
An Open Letter to Chip and System-level Designers Regarding 3D Integration
Dear Chip and System-level Designers, Allow me to introduce myself. My name is Françoise von Trapp, and I am known...
3D Integration Workshop Faces Reliability Challenges Head On
The Friday 3D Integration Workshop at DATE 2014 once again found me among friends, as an intimate group of about...
Making Progress with 3D IC Design and Test
Thank you, Ann Steffora Mutschler (Semiconductor Engineering) for getting to the bottom of the difference of EDA tools for 2.5D...
3D IC Design: Outlook for 2014
To date we at Mentor Graphics have seen a handful of 3D IC design releases, and even more customer evaluations....
2.5D Interposer Innovations from Silex and eSilicon
2.5D interposers sparked a good amount of discussion at this year’s 3D ASIP conference (December 11-13, 2013, Burlingame CA), with...
Part 2: 3D NAND Flash: Towering Spires or Costly Canyons?
In my last blog posting I went over the cost aspects of the Samsung-Toshiba 3D NAND approaches. The conclusion is...
TSMC 3D IC Reference Flows; A Leap Forward for the HMC
Big news for 3D ICs this week as TSMC and its OIP Ecosystem Partners announce the release of silicon-validated reference...
And a Good Time was had by All – 3D InCites Awards Breakfast, 2013
Despite the chilly San Francisco morning temperatures, a sizable crowd of 2.5D and 3D enthusiasts gathered at the Impress Lounge...
Momentum Builds for the 2013 3D InCites Awards
Subscribers are practically blowing up 3D InCites as they duke it out online and race the July 3rd deadline for...
Waiting For Godot? Report from D43D 2013, Grenoble, France
Last week, as I have been doing for the last few years, I went to the D43D Workshop. This year,...
Synopsys: Galaxy Implementation Platform
Product Description Synopsys’ Galaxy™ Implementation Platform is the industry’s leading solution for IC implementation and signoff. Now available with powerful... Cielution: CielSpot, CielSpot-CTM, CielMech
Product Description CielSpot, CielSpot-CTM and CielMech are thermal and mechanical simulation Software As A Service (SAAS) products based on Cielution’s... SavanSys Solutions: 2.5D & 3D Packaging Cost Model
Product Description The 2.5D & 3D Packaging Cost Model is the first tool available to model the total cost and... Apache Design: RedHawk-3DX
Product Description Apache Design’s fourth-generation RedHawk™-3DX simulation software technology extends previous generations’ capabilities to address sub-20 nanometer (nm) designs with... Mentor Graphics: Calibre
Product Description Calibre enables signoff verification of chip stacks with flip chips, silicon interposers and through-silicon vias (TSVs). Verification of... 