Unpacking AI’s Power-Hungry Demands
Dec 19, 2024 · By Jillian Carapella · 3D Event Coverage
Latest Posts - Page 9
3D NAND Flash at the 2014 VLSI Symposium
Imagine this: aquamarine tints of the Pacific washing sandy Hawaiian beaches amid the balmy breeze and only yards away, several...
2014 3D InCites Guide to 3D at SEMICON West
I can’t believe it’s already been a year since I last posted my annual guide to 3D at SEMICON West. ...
Time to Cast Your Votes for the 2014 3D InCites Awards!
The nominations are officially closed for the 2014 3D InCites Awards; and now comes the fun part. This year, while the industry...
3D InCites Interview: RTI in 3D
While most of the research institutes in the US and Asia have been focused on commercializing 3D integration technologies for...
Are Design Tools and Thermal Solutions the Missing Links to 2.5D and 3D IC Production?
On one side of the fence, we have semiconductor device manufacturers (fabs, foundries, and OSATS) claiming to be ready to...
Fine Tuning Processes for TSV Reveal
Through silicon via (TSV) reveal is a critical part of the wafer-thinning step in 3D IC backside processing, where the...
Setting the Record Straight On Applied Materials’ PVD Tool for 3D TSVs
Nothing makes me click a link faster than a title like “3D Chip Stack Tool Sends TSV Into High-Volume”, because...
Glass Interposers Take the Stage at ECTC 2014
I have to admit, for some time I’ve been fairly skeptical about glass interposer technology as a viable alternative to...
ECTC 2014: Bridging the Gap to 2.5D and 3D
Each year since I first attended the IEEE Electronic Component Technology Conference (ECTC) in 2009, the keynotes, panels and papers...
ECTC 2014: A Preview of 2.5D and 3D Activities
Each year, the agenda of Electronic Components Technologies Conference (ECTC), an international conference sponsored by the IEEE Components, Packaging, and Manufacturing...
Circumventing Temporary Bond/Debond, and other Cost-Saving Approaches to 2.5D Interposers
While GLOBALFOUNDRIES and STATS ChipPAC may have it all figured out, there are many who still consider temporary bond/debond (TB/DB)...
GSA Silicon Summit: What’s next for the 2.5D/3D Ecosystem?
Due to schedule conflicts, I was unable to attend this year’s Silicon Summit, which took place April 10, 2014 at...
3D Workshop Panel Discussion Focuses on 3D Standards and EDA Tool Readiness
Are slow standardization and CAD-tool development hindering the progress of 3D IC design and integration? This was the topic of discussion...
3D Integration Workshop Faces Reliability Challenges Head On
The Friday 3D Integration Workshop at DATE 2014 once again found me among friends, as an intimate group of about... Calling for A Collaborative Semiconductor Supply Chain Comes at DATE 2014
Design and Test Europe 2014 (DATE 2014), which took place in Dresden, March 24-28 2014, brought together semiconductor design and test...
A Solder Bump Expert’s Take on the Expanding World of Advanced Packaging
An interesting take-away from the keynote talk delivered by Brandon Prior, Prismark Partners, at this year’s IMAPS International Device Packaging...
Latest Developments in Cleans for TSVs and Cu Bumps
At IMAPS DPC 2014, which took place March 11-13, 2014, in Fountain Hills, AZ, there were several presentations focused on...
Magic Chip-powered SuperPoP offers Near-term Alternative to TSVs
When I saw that Dev Gupta, Ph.D, of Advanced Packaging & Systems Technology Laboratories, LLC (APSTL) was presenting at the...
Samsung’s V-NAND Flash at the 2014 ISSCC: Ye Distant Spires…
True to form, Samsung followed up it’s V-NAND Flash announcement of 2013 with a product chip-level presentation at the 2014 IEEE International Solid-State...
