Bringing Transparency to 3D Integrated Structures – Olympus Confocal IR Microscopy
Metrology is consistently one of the more challenging areas in the semiconductor field. Whether it’s the monitoring of ultra-small...
Francoise News - Page 57
Was Moore’s Law really meant to be a law or more of a guideline?
Before I joined the semiconductor industry, I was completely unaware of this guy Gordon Moore, whose observations and predictions set...Georgia Tech’s Rao Tummala to deliver IWLPC Dinner Keynote
Trend and Progress from ICs to 3D ICs to 3D Systems-on-Wafer
This year's IWLPC dinner keynote address...
IMAPS Global Business Council Announces Fall Progam
Titled "Recovery of the Semiconductor Market.", IMAPS GBC will feature two guest speakers. Andrea Lati, market research analyst for...
A*STAR and EDB launch 3D TSV consortium in Singapore
The Institute of Microelectronics (IME), a research institute of the Agency for Science, Technology and Research (A*STAR), launched a...
Inside CEA-Leti’s 3D Toolbox
Grenoble-based research institute CEA-Leti’s progress is fueled by a single mission: create innovation and transfer it to industry. The goal...Investment in ALLVIA climbs to $25M
ALLVIA, the first through-silicon via (TSV) foundry, reports it has...3D InCites: Unveiled
Today, July 6, 2009, is the day a vision becomes a reality. When I first started Françoise in...Following the BrightSpots 3D IC Forum
Day One: I'm not sure if it’s because it was the Monday after a U.S. holiday weekend, or just...
TSV copper fill: is it necessary for UBM?
In response to a recent post about the whether/when it is necessary to completely fill TSVs, or sufficient to...More about UBM for conformal TSVs
In response to the previous post, Bob Patti of Tezzaron Semiconductors weighed in with a solution to performing under bump...June Events in 3D
As May rolls right into June, so do the 3D events; or should I say events in which 3D topics...“Francoise in 3D” resurfaces in AZ
For the past two weeks, I’ve been slightly preoccupied with relocating from Massachusetts to Arizona. For much of that time,...SUSS MicroTec workshop zeroes in on wafer thinning and handling issues
Last year, it was all about through silicon vias (TSVs), this year, it’s all about everything else needed to...
IMEC and SUSS MicroTec to collaborate on wafer bonding for 3D integration
SUSS MicroTec and IMEC have entered a joint development program to develop permanent bonding, temporary bonding...Trends and challenges for thin wafer processing
Processes addressing the handling of ultra-thin wafers have been a hot topic ever since it became clear that they are...A Visit to SUSS MicroTec
It’s been...
