This was my second year attending the Medical Electronics Symposium, and I’m not sure what I was expecting, but when it came to technology advancements themselves, I noticed that not much exciting has happened since last year. Or maybe I’ve just been spoiled. Not every year can be about earth-shattering technological breakthroughs. This was the year about continuing progress of the breakthroughs of the past few years.
Wearable or Implantable?
Eric Dy, of imec, touched on the progress of the research institute’s continued work on heterogenous packaging strategies for medical microdevices – dubbed the Human + + Program, in an ongoing effort to “Merge biology and electronics for a better life”. Imec has developed an assortment of technologies targeting wearable and implantable devices, the choice of which to use depends on whether it will be used inside or outside the body. Dy says focus is currently on reliability testing of technologies like the ultra thin chip package (UTCP) that was introduced at ECTC 2009, and stretchable mold interconnect (SMI), both of which are critical for the flexible, stretchable needs of next generation ‘smart patches.’ The next generation of UCTP is flat and stackable, which will officially take this embedded technology into the 3D world.
3D SiPs
I also caught up with Christian Val of 3D Plus, who continues to doggedly promote his company’s stacking technology based on rebuilt known good wafers (KGRW), taking them into the third dimension using a proprietary process called wire-free die on die (WDoD). Val claims this process allows for stacking systems in package (SiPs) without using TSVs or interposers. (This could be a tough sell with so many in the industry currently promoting interposer technology as an interim TSV solution, while the industry works out the kinks for full-blown TSV 3D IC stacks.)
In his presentation, Val reported that there are now several sources of KGRW available, and includes Freescale’s redistributed chip package (RCP) and Infineon’s embedded wafer-level ball grid array among them. While RCP and eWLB are considered fan-out wafer level packaging technologies, 3D Plus’s version is what Val called a µ-fanout WLP that uses µRDL on the die and polymer around it to reduce the number of RDL layers outside the die to one.
Val says 3D Plus has been manufacturing products for space applications. In the medical applications market, 3D Plus has contributed to the e-Cubes and subsequent e-Brain projects – both EU funded – as part of pacemaker and hearing aid technology (e-Cube) and as a MEMS system solution (e-Brain.)
Next on the list is to qualify RCP with Freescale by Q411, and there’s a decision to be made before the end of this year, whether to launch a WDOD manufacturing line in the south of France, or go with a licensing business model. Val says he prefers the former option, as the value proposition is better than licensing.
3D Systems
A similar solution using embedded component technology was presented by C. Paul Christiansen, of Potomac Photonics, Ltd. This approach uses nanoparticle silver conductors to connect miniature embedded components. It’s a laser-based approach that can reportedly produce fine line interconnect structure. After interconnection, the assembly is encapsulated in a thermally conductive epoxy. Additionally, Christensen says the company has also developed techniques for stacking and interconnecting circuit modules to form 3D systems. In comparing this approach to similar embedded approaches used by such industry players as Imbera, Verdant Electronics, Georgia Tech, Fraunhofer, etc, Christensen says Potomac’s contribution to the mix is simplicity. He noted that what he’s presenting is a snapshot of a work in progress, and the company is “getting interesting results with interesting implications.” Thus far, the benefits of this approach include high miniaturization, flexible 3D form factors, low-cost assembly requiring minimal capital equipment, ‘green’ fabrication processes, modular testability, easy design changes, and small or large batch manufacturing.
Miniaturization: The Ultimate Driver
So ultimately, where are we in terms of incorporating 3D technologies into medical devices themselves? Getting closer for sure. Because lets face it, smaller implantable devices mean smaller incisions, are less intimidating, more comfortable, and according to Tom Zemite, strategic marketing manager for Microsemi Corp,.can also have more features and a longer battery life. Take, for example, Microsemi’s progress with power packaging for implantable cardio applications.
Zemite noted improvements in substrate assembly by going to chip-on-board, chip-to-chip using flip chip processes, and both 2D and 3D packaging that achieve space savings of 60-80%. A novel use for TSVs is in Microsemi’s flip chip planar packaging, which Zemite says that produces a planar, chip scale package by bringing contacts to the same side. This configuration achieves 50% size reduction over chip and wire discrete designs while maintaining surge performance.
Zemite says the company has developed a power silicon on insulator (PSOI) technology that is easier to handle than die or flip chip, eliminates wire bonds, and is stackable for 3D designs. According to Zemite, PSOI, TSV and 3D holds promise to meet reliability, size, performance and cost of implantable devices.
So there you have it. Progress IS progress. I’m already looking forward to what the next year brings.
