With the increasing expectations and demands of customers of electronic equipment, the manufacturing technologies applied are also propelled due to rising requirements. Powerful wearables, the Internet of Things (IoT), mobile communication devices, and new huge data storage subsystems push the semiconductor industry and the electronics designers to new heights, and production specialists now encounter limits of their packaging inspection systems. As we can see, electronic devices getting smaller and smaller and ideally losing always a bit of weight, whereas the performance is going to be enhanced continually.
Evermore semiconductor manufacturers are adopting different advanced packaging technologies, and also heterogeneous integration is a hot topic, especially for designing systems in a package. Advanced packaging is among the fastest evolving areas of the semiconductor industry, featuring even smaller component sizes, lower power consumption, and remarkably increased I/O connectivity for providing more functionality. The various advanced packaging options, such as System-in-Package (SiP), Fan-out wafer-level packaging (FOWLP), 2.5D, 3D chip build-up, etc. have, of course, added the necessary flexibility and performance to many applications. As customers demand more sophisticated functionality in smaller devices, the application of delicate components is a necessity. However, we have to keep in mind, all those advancements come at the cost of increased package complexity such as adding more layers, even finer features, and more I/O channels.
With these continually growing and tougher requests from the technical side, the conventional way of packaging inspection and quality control in the semiconductor as well as in the electronics manufacturing industry is going to become highly critical. The new packaging technologies and solutions are way more demanding than the semiconductors used before. Inefficient or inadequate manual or semi-automated and time-consuming methods of inspection and quality assurance have definitely to be replaced with potent systems that at least meet or even surpass the requirements of today’s electronics components.
It should not be forgotten that aging standard SMT inspection systems (AOI) may now reach their limits in providing sufficient resolution for very small printed solder pads with needed accuracy and repeatability. So a generation of brand-new inspection technologies is then necessary which can provide optimum or extremely better solutions for the continually increasing complexity in the industry. Koh Young, the leading provider of 3D measurement-based inspection solutions, has now launched the systems Meister S, D, and D+; they are delivering unsurpassed levels of repeatability and accuracy for the verification tasks of advanced packaging devices at semiconductor fabs as well as in the electronics manufacturing industry.
Next Level in the Integration of Functions
In general, semiconductor packaging technology has been evolving constantly at a fast pace to support increased device density, functionality, and I/O connectivity. Moore’s Law (the number of transistors will be doubling in dense semiconductors every two years) is obviously slowing down for a couple of years. For example, the number of transistor functions of a component such as a microprocessor was used as a benchmark. The change in reducing these growth numbers can be seen occurring in many applications, the rate of acceleration is slowing down after more than 30 years of continual progress.
The previous development in chip technology was focused on miniaturization and complexity. The trend is now to include more versatile, sophisticated functions in a lot of different applications. And at the same time, cost-effectiveness, performance, and higher integration have become of very high interest in order to serve the market demand with novel devices providing even more functionality to the customers.
So more manufacturers are then adopting SiP component configurations featuring the split of functions into single blocks resulting in a couple of tiny single components mounted in one and the same compact package. This technique can enable new levels of higher integration and consequently lead to size reductions for embedded systems. In contrast, the approach of System on a Chip (SoC) differentiates significantly from this integration method as all functions implemented in SoC components are integrated into the same single die.
Defect Challenges Growing in Advanced Packages
As all the processes and features are becoming highly delicate and complex with more layers and I/Os, also the source of possible defects in the package getting smaller, making them harder to inspect with the current systems from the market. With the miniaturization of electronic devices, the processable areas of a wafer must be used optimally in order to get the high yield required. The number of components on a single wafer disc increases exponentially with every shrinking step of their geometries. The higher component density causes a particularly demanding situation, because the components become not only smaller but the higher density on a wafer disk also leads to disturbing shadowing effects which render an efficient and precise inspection almost impossible with the traditional instruments.
For years, the industry had relied upon 2D solder paste Inspection (SPI) and automated optical inspection (AOI) systems to locate visible defects. However, the conventional 2D inspection can be significantly challenged by certain aspects of today’s semiconductor applications. Shiny die surfaces can diffuse inter-reflections, which may create an unacceptable level of uncertainty between the height and tilt of the surface. The inability to detect defects with high accuracy has a direct impact on the yield figures. And it should not be overlooked that the amount of costs of an undetected possible production failure increases in the field dramatically, especially when health and safety concerns are involved such as in the case of automotive advanced driver-assistance systems (AADAS) and other sensitive applications.
As it turned out, electronics manufacturers encounter huge difficulties with the packaging inspection of shiny components in 3D and 2D techniques. Koh Young developed for this demanding issue to be solved, the novel Meister D/D+. With these systems, users can overcome those critical tasks in the manufacturing line by employing a full and uncompromised 3D inspection and 2D inspection for secure verification of demanding failures of all kinds, including very fine cracks and even foreign material inspection.
The systems Meister S, D, and D+ do combine the proven Moiré technology and modern optical configurations to reliably support inspection of shiny components in 2D and 3D. With their newly developed technology, they are the perfect fit for the inspection of SiPs on SMT electronic board assemblies, among other critical applications. The brand-new systems feature this extra capability as an expansion of Koh Young’s superior AOI technology with a different optical system configuration compared to the Zenith series (different lighting system).
The latest Meister system is optimized for the inspection of dies and ensures the fastest, most accurate measurement with an 8-projector inspection probe tailored for typical SiP components including microchips and tiny chips. Especially, the shadowing problems caused by small and narrow gaps are a thing of the past now. The very high precision of the inspection results is assured by the camera subsystem featuring 25 MP and 3,5 um resolution. With the ongoing miniaturization, the requirements for a higher resolution of inspection systems are also increasing, of course. At least 100 pixels must be available for a single repeatable measurement of the finest and smallest feature. Also, the flatter angle of the projection units enables the measurement of low heights and the compensation of interfering reflections.
The system allows full and uncompromised 3D inspection of dies, as well as of cracks on 0201M (008004-in) SMDs. The new evolution is based on Koh Young’s proven inspection technology, now employed in a novel way available for other critical tasks. In putting the new solution on the proven platform, Koh Young ensured that customers can expect extremely reliable results with the highest possible confidence. Accurate measurements are guaranteed. From these, the user benefits of the Meister systems are becoming quite clear: With their high accuracy they minimize drastically the number of unidentified defects, and in turn, increase the production yield with a secured higher quality. As it comes down to the insight of all electronics manufacturers: more accurate data in the localization of possible defects in an early stage of production is key for adding higher value and saving costs.
Packaging Inspection Solutions
Advanced packaging is becoming much more prevalent in the market, thanks in part to its advantages over traditional device packaging methods. However, board complexity and shiny die surface make the inspection process in the manufacturing line more challenging. The industry requires a high-precision inspection solution to overcome these challenges. When looking for the appropriate system to choose, then it is definitely of very high priority that the product manufactured is known in detail, then the decisive criteria can be set, and the optimum equipment solution can be selected.
With a competent partner as the solution provider, the process of the localization of a capable and appropriate system meeting the requirements is no rocket science. It goes almost without saying that it is of utmost importance that customers can rely upon a solid and trustful partnership providing a suitable experience of the market, technology, and process demands. Koh Young, the leading 3D measurement-based inspection solutions provider, launches now the Meister S, D, and D+, the next system generation of systems for extended repeatability and accuracy to be employed for the use with even more sophisticated advanced packaging devices.
