SETNA, in conjunction with Research Triangle Institute (RTI), has developed a binary alloy (Silver-to-Indium) bonding system for 3D IC assembly that can be compression-bonded at room temperature. Following 3D IC chip stacking, the Ag-In structure is annealed in the solid-state (no melting) to form an Ag₂In interconnect which is stable to greater than 600℃.
Testimonial
Room-temperature bonding of 3DIC stacks eliminates numerous issues currently hampering 3DIC stacking such as:
- Chip/substrate warping due to CTE issues,
- Progressive oxidation of exposed contact metals, or need for an inert gas bonding zone,
- Instability of stacked bonds during additive reflow steps,
- Slow bond cycle time due to heating/cooling ramps,
- Chip TTV, bowing, and surface flatness issues,
- Solder bridging during reflow, or high compression force during TC bonding.
The Ag-In binary system eliminates all of these issues with instantaneous room-temperature bonding in open ambient. Additionally, the atmospheric plasma surface treatment which enables this instant bond also activates chip front and back surfaces for rapid wicking of underfill, even in bond gaps as small as 2-3µm. The resulting small thermal impedance enables efficient cooling from chip-to-chip in the stack. Structural integrity of the chip stack is maintained during bonding, anneal, and subsequent reflow assembly.
- SETNA Website
- Date this Product was Introduced to the market: 11/06/2013
- Category Product is Being Nominated for: Processes
- Technical Information for Room Temperature 3D IC Assembly
