Chiplets are the new “It” heterogeneous integration technology. Many believe they provide the solution to power, performance, area and cost (PPAC) for everything from mobile computing and automotive applications, to 5G, high-performance computing, and artificial intelligence. In this podcast episode, Françoise speaks with 3D InCites’ Community Members, Kevin Rinebold of Siemens EDA, and Robin Davis of Deca to explore how successful chiplet integration begins with a collaborative design flow.
To get started, we’ll get some of the chiplet back-stories, beginning with the advantages of disaggregating SoC into hardened IP blocks of different nodes, and reintegrating them on an “interconnect fabric.” From there, we define what we mean by chiplets, what differentiates them from system-in-package, and how different advanced packaging architectures can be implemented to create chiplet packaging. We also discuss the main challenges of designing chiplet packages; such as who owns the design? Is it the IC designer or package designer? How do we manage the die shift? How do we manage multiple designs?
Additionally, Kevin and Robin talk about their companies’ respective design kits, and how they are working together to enable a chiplet ecosystem.
Papers/presentations referenced by Kevin and Robin include:
Using a System Technology Co-Optimization Approach for 2.5/3D Heterogeneous Semiconductor Integration – Siemens EDA
Adaptive Patterning Techniques for the Chiplet Era – Deca
Contact the Speakers on LinkedIn:
Kevin Rinebold
Robin (Gabriel) Davis
Kiterocket
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