IMAPS Live Virtual Workshop on THERMAL MANAGEMENT

General Chair: Dr. Sanjay Misra, Senior Scientific Principal, Adhesive Electronics, Henkel Corporation

The value of a Dynamic Compact Thermal Models (DCTM) in electronics thermal design have been understood for a number of years through their ability to accelerate the design process.  Explicit representation of all components with a detailed system level CFD (Computational Fluid Dynamics) analysis is not well suited for understanding the dynamic temperature response of a system.  A transient CFD analysis can be prohibitively time consuming.  Thermal RC networks have been used as a DCTM but are time consuming and require a trial-and-error approach to develop.  In addition to the difficulties and limitations of the current approaches, the compact models generally don’t support parallel design processes such as Electro-Thermal or reliability predictions. Transient superposition is another method that has been used to accelerate the design process and is applicable to many system topologies without the need for fitting and testing multiple RC networks until the desired accuracy is achieved.  Though transient superposition is an accurate approach it hasn’t been widely adopted by the thermal design community in part due to their boundary condition dependence and limited port-ability to other design flows.  Reduced Order Modelling is an alternative approach to extracting a DCTM from a thermal simulation model.  A BCI-ROM (Boundary Condition Independent Reduced Order Model) provides analysis speed, Boundary Condition Independence, and solution environment flexibility to facilitate parallel design processes that require temperature response as an input.  The new approach to BCI-ROM development is an extension of the FANTASTIC method and is applicable to any arbitrary system topology for the thermal design of electronics.  The process requires little expertise to develop and generates a BCI-ROM of user defined accuracy.

At hexagon we’re dedicated to bringing the virtual and physical worlds together to enable our customers to drive their ideas forward and stay ahead. Nowhere is this more important than in the design and manufacture of industrial and consumer electronics. In this session we’d like to explore some of the possibilities and benefits to be had from coupling some of the latest micro scale scanning and computed tomography capabilities, with robust material behavior modeling, to drive a more complete and accurate view of electronic thermal, thermo-structural & fatigue performance challenges. We’ll look at some of the technologies involved, review customer examples and their results. In order to simulate something, you need to know what it’s made of. So why do we rely on in-precise & simplistic assumptions about material definitions to inform our thermal, structural & fatigue estimations? We believe there’s some significant benefits to had from driving up electronic thermal performance and reliability based on real-world parameters, not idealized ones.

Ongoing miniaturization of electronic components and systems enables future wearable and mobile devices for a smart, interconnected world. Increasing packaging densities and thus high power densities are a result of the miniaturization trend. In power electronics, thermal management of all components is of special importance as high temperatures in electronic systems are a main course for system degeneration and reduced system lifetime. If device temperature is well considered and managed, lifetime can be increased and natural resources saved. For example, currently in data centers 40% of the consumed energy is needed for cooling. [2] Modern electronic devices often employ structures or thin films in the micro- to nanometer range. Their thermal properties (like the thermal conductivity λ) usually deviate from the bulk value and have to be well understood to allow effective heat management. For thermal analyses, infrared thermography can provide mappings of the entire temperature distribution in the area of interest, but has limited lateral resolution of approximately half of the used wavelength. [10] The same limitation applies to other optical techniques like micro-Raman spectroscopy or optical transmissivity measurements. [9] In this work, Scanning Thermal Microscopy (SThM) and Time Domain Thermoreflectance (TDTR) are employed for quantitative thermal characterization of thin films structures in the micro- to sub-100 nm regime. The complementary methodology of SThM and TDTR is used to characterize thermal properties of Si-Ti-TiN-W-Al thin film stacks, used in, e.g., IGBTs (insulated-gate bipolar transistors).

Continued miniaturization, automotive electrification, 5G and Industry 4.0 demand ever increasing use of thermal solutions for performance, reliability and safety of power electronics. Power electronics based on silicon devices must operate below 125 C and IGBTs under 150 C – WBG devices could extend this to 200 C.  Thermal management of power electronics requires interfacing the package to a heat sink using a thermal interface material (TIM). Traditionally used thermal greases provide good end of line performance but they can degrade. TIMs come in a wide variety of properties, physical formats and automation readiness to suit the wide variety of applications. Additionally, TIMs may be tasked with insulation reliability, adhesion and encapsulation. We will discuss thermally conductive solutions including greases/gels, liquid and solid gap fillers as well as metal core PCBs and their use in cooling power electronics – with reference to performance, reliability and manufacturing.

Thermal management is always a challenge in the electronic industry. The need for faster, more powerful devices makes this challenge even harsher and more difficult to overcome, thus the need for improved high performance materials continues to grow. The solutions for thermal interface material (TIM) include thermal grease, thermal gel, phase-change material, solder preform, and liquid solder [1-3]. All of those suffer from either performance limitation such as pump-out, or building of liquid solder dam, or poor thermal conductivity. Solder paste and solder preform are thermally effective as TIM. However, the constraint is that both sides have to be solderable metallization. Consequently, the flip chip backside and the package housing or heat sink need to be plated with solderable surface finishes, such as NiAu. This inevitably increases the cost. Solder paste suffers further from flux fume and voids generated, therefore is obviously unacceptable. The voids are results of outgassing within liquid solder joints. With solder preform being a good thermal conductor, a solder preform-like material which maintains the shape of preform but forms intimate contact in-between flip chip and housing without metallization will be desired. Furthermore, the shape of preform should be maintained even at subsequent SMT assembly reflow process, similar to our earlier work [4]. If a type of filler particle with thermal conductivity better than that of solder can be incorporated in the solder paste, this TIM material will have an enhanced thermal conductivity. A novel epoxy SAC solder paste TIM system has been developed with the use of non-volatile epoxy flux. Cu filler was added to the solder paste, with Cu volume % of metal ranged from 17 to 60 volume % of metal. Formation of semi-continuous high melting Cu chain network was achieved, with the use of CuSn IMC bridges between Cu particles.

General Chair: Dr. Sanjay Misra, Senior Scientific Principal, Adhesive Electronics, Henkel Corporation