2025 3D InCites Technology Enablement Awards Finalists

The Technology Enablement Awards will honor companies that have identified and solved critical challenges in the commercialization and manufacturing of HI, 3D HI, and chiplet architectures, driving the industry forward through cutting-edge solutions and advancements.

Our advisory board reviewed applications and has selected the following eight, 2025 3D InCites Technology Enablement Awards finalists. Each applicant answered three questions: What is the challenge you’ve identified, what is your solution, and how does it apply to the commercialization and manufacturing of HI, 3D HI, and chiplets? What follows are summaries of how each finalist answered these questions.

ACM Research

With the growing demand for AI applications requiring large chiplet GPUs and high-density HBM, the industry is shifting from traditional 300mm wafer packaging to larger substrates like 510x515mm or 600x600mm to reduce costs and improve efficiency. ACM Research’s Ultra ECP ap-p system is the first commercial high-volume copper deposition tool designed for panel-level packaging, offering advanced solutions for processes like pillar, bump, and RDL plating. Its horizontal chamber configuration ensures excellent uniformity, minimizes contamination, and supports up to 16 plating chambers. The system is operational in cleanrooms, with additional units set for deployment to customers

ACM Research Ultra ECP ap-p system
ACM Research Ultra ECP ap-p system

Resonac

Resonac plays a pivotal role in advancing semiconductor performance through innovative packaging technologies and ecosystem collaboration. To address challenges in heterogeneous integration and chiplet packaging, the company developed the JOINT2 Consortium, which focused on fine pitch bonding, underfill materials, and advanced processes like semi-additive plating and polymer damascene. Achievements include successful 10 μm pitch bonding with flux-less technology and demonstrated 1/1 μm line/space capabilities.

Building on this success, Resonac is leading the US-JOINT consortium in Silicon Valley, partnering with 10 global manufacturers and institutions like the Texas Institute for Electronics to accelerate R&D in advanced packaging. This initiative fosters collaboration across materials, equipment, and design to fast-track commercialization and innovation

Resonac's JOINT2 Facility in Japan
Resonac’s JOINT2 facility in Japan

Onto Innovation

Onto Innovation is driving advancements in chiplet integration and high-performance packaging with its Packaging Applications Center of Excellence (PACE) in Wilmington, Massachusetts. PACE focuses on co-developing next-gen architectures and packages alongside key industry partners, addressing challenges like shrinking line/space (l/s) requirements and the shift to glass core substrates for enhanced stability and electrical performance. The facility features Onto’s JetStep® lithography system for sub-1.5μm l/s imaging, Firefly G3 inspection tools for glass panel metrology, and the Discover Command Center for AI-driven process controls. This collaborative ecosystem accelerates innovation and supports the transition to high-volume manufacturing.

Onto Innovation's PACE Center
Onto Innovation’s PACE Center

NHanced Semiconductor Inc.

NHanced Semiconductor Inc. is revolutionizing heterogeneous 3D hybrid integration (3DHI) by overcoming challenges associated with integrating diverse materials like GaN, SiC, and LiNbO3. Using techniques such as incremental annealing and material thinning, NHanced achieves high-density interconnects with hybrid copper and covalent oxide bonding. These innovations enable the production of advanced 3DHI devices with unprecedented performance and power efficiency. By facilitating the integration of exotic materials, NHanced unlocks new possibilities, including intelligent AI-enabled IR sensors, advancing applications previously unattainable with traditional approaches.

NHanced Semiconductor Inc's 3D HI process technology.
NHanced Semiconductor Inc’s 3D HI process technology.

Nordson Test & Inspection

Nordson Test & Inspection’s revolutionary SpinSAM Acoustic Microscopic Imaging (AMI) system sets a new standard for wafer inspection in semiconductor manufacturing. With a compact footprint and unmatched throughput, SpinSAM scans up to four 300mm wafers simultaneously using proprietary non-immersion transducers, ensuring streak-free, high-resolution imaging while minimizing contamination risks. The system delivers complete wafer images without stitching in under six minutes, supporting diverse applications like bonded wafers and MEMS. Features like global tool matching, continuous operation, and efficient repairs streamline production, making SpinSAM a cutting-edge solution for high-yield, high-quality semiconductor inspection.

Nordson Test & Inspection’s SpinSAM AMI system.

Siemens Digital Industries Software

Siemens Digital Industries Software is advancing 2.5D/3D IC heterogeneous integration with its Innovator3D IC platform, introduced in September 2024. This AI-enhanced co-design tool enables system-centric planning for die, interposer, package, and PCB design, ensuring seamless digital continuity. Innovator3D IC leverages predictive modeling for power, performance, area, cost, and reliability optimization, supporting interfaces like UCIe, HBM, and BoW. By providing early insights into thermal, mechanical, and electrical performance, it reduces design iterations and accelerates development. This comprehensive solution empowers engineers to create optimized, production-ready designs, transforming semiconductor design workflows.

Innovator3D IC is a 2.5/3D heterogeneous integration planning cockpit for multi-die and chiplet based semiconductor devices

Saras Micro Devices

Saras Micro Devices is redefining power delivery for high-performance computing (HPC) and AI applications with its innovative STile embedded capacitor and voltage regulator solutions. These products enable embedded vertical power delivery (eVPD), reducing power delivery losses and improving efficiency by shortening the power pathway and minimizing the need for surface-mount components. This approach supports higher power densities in compact designs, unlocking the full potential of chiplet-based, multi-device architectures. Manufactured in Chandler, AZ, Saras collaborates with leading semiconductor suppliers to tailor STile solutions, accelerating design cycles and advancing integration for next-gen processors.

Saras Micro Devices STile embedded capacitor and regulator solution.
Saras Micro Devices STile embedded capacitor and regulator solution.

MacDermid Alpha Eletronics Solutions

MacDermid Alpha Electronics Solutions addresses key challenges in heterogeneous integration (HI) and hybrid bonding with its NOVAFAB Fine Grain Copper electroplating process. Designed for high-density interconnects, this ultra-pure copper film ensures controlled grain growth during annealing, enabling defect-free bonds and enhanced device reliability. With a sub-2μm grain size, it minimizes signal degradation and meets the mechanical and electrical demands of advanced applications. Seamlessly integrating into high-volume manufacturing, NOVAFAB supports the performance and yield requirements of 3D stacking and chiplet integration, making it a reliable and scalable solution for next-gen electronics

MacDermid Alpha NOVAFAB Fine Grain Copper electroplating.