Patti’s keynote address will highlight the role of advanced packaging in extending the progress of Moore’s Law in semiconductor development through an innovative manufacturing model that employs a range of 3D IC processes
At the upcoming IEEE International 3D Systems Integration Conference (3DIC), NHanced Semiconductors president Robert Patti will deliver a keynote address detailing the critical role of advanced packaging in continuing the progress of Moore’s Law in semiconductor development. According to Patti, transistor scaling alone no longer delivers meaningful benefits in economics, speed, and effective chip size.
In his address, Patti will detail a new path forward for the electronics industry: a manufacturing model he calls Foundry 2.0. This radical shift from the traditional semiconductor manufacturing model focuses on advanced packaging to integrate heterogeneous components in 3D and 2.5D devices.
NHanced Semiconductors is the first US-based pure-play advanced packaging foundry that employs this revolutionary business model. Foundry 2.0 sources best-of-class components from traditional foundries and applies semiconductor foundry processes to combine them in novel and powerful assemblies. This manufacturing model is inherently different from today’s traditional foundries.
The 2024 IEEE 3DIC conference will be held at the Hotel Metropolitan Sendai and Sendai Kokusai Hotel in Sendai, Japan, September 25-27. The conference will focus on the research and science of 3DICs, covering relevant 3DIC topics, including chiplets, photonic interconnect, micro-die handling, and exotic substrates. The program also includes topics such as manufacturing processes, materials, and equipment, as well as circuit designs, design methodology, and applications for 3DICs.