More on TSMC’s SoIC Hybrid Bonding Technology
Nikkei Asia announced that TSMC is working with Google and AMD to develop its SoIC hybrid bonding packaging technology.
Google plans to use the SoIC chips for autonomous driving systems and other applications. AMD is reportedly eager to take advantage of chip stacking technologies in hopes of outperforming those of its competitor Intel.
TSMC reportedly plans to build SoIC at a new packaging facility in Miaoli Taiwan. Construction on the plant is slated for 2021, with mass production to begin in 2022. TSMC has a chip packaging plant in Taoyuan, mainly in production for Apple requirements. Besides Taoyuan and Miaoli, TSMC is also building a chip packaging plant in Tainan near its most advanced 5-nanometer chip plant 18.
IFTLE has discussed TSMC’s SoIC hybrid bonding technology in IFTLE 454 “TSMC Exhibits Packaging Prowess at Virtual ECTC 2020”
Traditionally, while TSMC manufactured chips for almost all of the world’s key chip developers including Apple, Huawei, Google, Qualcomm, Nvidia, and Broadcom, it left chip packaging services to the outsourced semiconductor and test services (OSATS) providers such as ASE, Amkor Technologies, and Powertech. IFTLE readers know that more recently, TSMC has been working diligently to penetrate the advanced packaging market. They were the first foundry to offer bumping services and the first company to offer a commercial 2.5D process flow [see IFTLE 122 “TSMC officially ready for 2.5D …”]
Nikkei notes that TSMC’s packaging efforts are aimed at premium clients at the top of the food chain like Apple, Google, AMD and Nvidia, who would be more likely to require such services. “Such newer chip stacking techniques require advanced front end chip manufacturing expertise …so it’s very difficult for traditional chip packaging providers to provide what is required.”
According to Nikkei, TSMC’s revenue from chip packaging and testing services reached $2.8 billion in 2019, around 8% of its total revenue of $34.63 billion, and is expected to grow at close to the same rate as its revenue for 2020.
Interestingly Nikkei also reports that SMIC, China’s biggest contract chipmaker is looking at building similarly advanced chip packaging capacity and has ordered equipment from some of TSMC’s suppliers to run a small-scale advanced packaging line.
Samsung, on the other hand, is also aggressively expanding its foundry operations with Qualcomm and Nvidia as key customers. Their packaging expertise will put them in direct competition with TSMC.
More on Intel Missteps
Recently, Bloomberg published an interview with Stacy Rasgon, a semiconductor analyst at Bernstein Research on “How the Number One U.S. Semiconductor Company Stumbled “
Let’s take a look at what they had to say.
Rasgon contends that Intel is falling further and further behind TSMC. The current issue is with 7nm processing, but this is not the first time Intel has had a problem. “…10nm was delayed and forced them to sit 2 extra years at 14nm… Even their 14nm was delayed a year to reach manufacturable yields when they launched it.” Thus, Rasgon claims “…the manufacturing problems at Intel have been building for at least half a decade+ and appears to have finally hit a wall.”
IDMs like Intel design and manufacture their own chips. With today’s fab costs such companies must have enormous chip orders to justify spending on the latest node fabs.
TSMC’s business model is to manufacture for fabless companies. This foundry model allows them to agglomerate the needs of the Qualcomms and Nvidias and build up the revenue needed to support today’s manufacturing facilities. This fabless foundry model is ascending vs the traditional Intel IDM model.
Rasgon points out that Intel’s current manufacturing issues are also beginning to interfere with its design capabilities since designers can no longer be assured of when a certain node chip will be available. Intel cannot simply throw their designs over the wall to TSMC. They will need to be redesigned to conform to TSMC design rules.
So what are the manufacturing problems at Intel, according to Rasgon?
The 10nm process used multiple patterning for the first time and it caused major problems. They introduced Cobalt and other new materials. All of this was probably too big of a leap. At 7nm they moved to extreme ultraviolet (EUV) lithography to replace multi-patterning, but other issues must have come up. “…Going forward their credibility in the community is now approaching zero.”
Intel competitor, AMD, went fabless during the financial crisis. It started procuring from GlobalFoundries (GF), but GF had problems with its process technology development as well, and they announced they would not move to newer nodes. So.AMD made a switch from GF to TSMC.
According to Rasgon, Intel is now faced with a choice. Should they also outsource their 7nm chips or continue to try and fix the problem? Bernstein Research expects that ¾ of Apple’s notebook business will move away from Intel next year.” When asked what Intel will look like in 3 years, Rasgon replied “No one knows.”
Bernstein has run models of what Intel would look like as a fab lite or fabless company. In the current competitive environment, they project that gross margins would be lower but at the same time, they would save on CAPEX and R&D spending. Its ability to ship would be limited in how much capacity it could get from TSMC.
Asked if Intel required TSMC to manufacture its chips would this pose a national security issue, Rasgon answered “YES”. “Taiwan would become the strategically most important country on the face of the earth.”
When asked whether US policy needed to help out Intel financially, he replied that Intel’s issue is NOT money. Money will not fix their manufacturing problems. Rasgon concluded that “If the US is serious about bringing back chip manufacturing we need an Apollo moment…If the US is serious about this we will need to spend hundreds of billions of dollars “
and from the Oregonian….. [link]
“Intel is openly flirting with the notion of moving leading-edge production from Oregon to Asia and hiring one of its top rivals to make Intel’s most advanced chips… The company says a decision is likely in January.” The Oregonian notes that this is a momentous decision that follows a string of manufacturing setbacks at the Hillsboro campus, failures that have cost Intel its leadership in semiconductor technology – perhaps forever.
Industry analyst Dan Hutcheson of VLSI Research (through the Oregonian) reports that such a transition could render Oregon “irrelevant” if Intel gradually shifts away from integrated research and manufacturing. The Oregonian quotes Hutchinson as saying “Companies say they’re making a transition. What they find is they’re stepping off a cliff……they’re going down a road that you can’t easily go back on. …..once they start going down this path it’s almost impossible to go back because it creates its own momentum.”
Intel has suffered technical setbacks with its 14nm, 10nm, and now 7nm processes in recent years. The company has had a recurring problem with the “yields” on its advanced processors. These successive stumbles undermined investor and customer confidence that Intel can deliver future upgrades in chip technology.
Intel CEO Bob Swan recently told Wall Street analysts that it may outsource advanced production to its rivals naming TSMC specifically. Swan said Intel believes it can send advanced production overseas while retaining internal production for older products that don’t require the most sophisticated technology. Swan said Intel believes it could restore advanced manufacturing to its own factories sometime in the future if it chooses to [IFTLE contends that would be as the Japanese say “very difficult”].
For all the latest in Advanced Packaging stay linked to IFTLE…………………………….
