EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it has successfully demonstrated a complete process flow for collective die-to-wafer (D2W) hybrid and fusion bonding with sub-two-micron placement accuracy utilizing existing EVG wafer bonding technology and processes, as well as existing bond interface materials. This breakthrough, which was demonstrated at EVG’s Heterogeneous Integration Competence Center™, represents an important milestone in accelerating the deployment of heterogeneous integration (HI) in next-generation 2.5D and 3D semiconductor packaging.
Located at EVG’s headquarters, the Heterogeneous Integration Competence Center offers consultancy services, feasibility studies and demonstrations, process development support and pilot-production services. Serving as an open-access innovation incubator, it is designed to help customers accelerate technology development, minimize risk, and develop differentiating technologies and products through HI/advanced packaging all while guaranteeing the highest IP protection standards that are required for working on pre-release products. All process and integration aspects of both wafer-to-wafer and different D2W integration approaches are focus technologies at the center.
Leading-edge applications such as artificial intelligence, autonomous driving, augmented/virtual reality and 5G all require the development of high-bandwidth, high-performance and low-power-consumption devices without increasing production cost. As traditional 2D silicon scaling reaches its cost limits, the semiconductor industry is turning to HI – the manufacturing, assembly and packaging of multiple different components or dies with different feature sizes and materials onto a single device or package – in order to increase performance on new device generations. Collective D2W bonding is an essential HI process step that enables functional layer and known good die (KGD) transfer to support cost-efficient manufacturing of new types of 3D-ICs, chiplets, and segmented and 3D system on chip (SoC) devices.
“For more than 20 years, EVG has provided process solutions and expertise to support the advancement of HI, including D2W bonding, where our technology has been successfully implemented in high-volume manufacturing applications,” stated Markus Wimplinger, corporate technology development & IP director for EV Group. “Our Heterogeneous Integration Competence Center, which is supported by our worldwide network of process technology teams, enhances our capabilities in this critical area by providing a foundation for customers and partners working with EVG to develop new 3D/HI solutions and products. Among these is our new collective D2W bonding approach, where we have demonstrated the ability to perform all key process steps in-house with high placement accuracy and transfer rate using our existing wafer bonding and debonding, metrology and cleaning process equipment along with select third-party systems from our development partners. We’d like to thank our partners for their role and support in enabling this important achievement. A special thanks goes to IRT Nanoelec and CEA-Leti, which both provided the substrates that were used in this demonstration.”
Results of the Collective Die-to-Wafer Bonding Demonstration
A technical paper highlighting the results of EVG’s collective D2W bonding process was presented at the Electrochemical Society (ECS) PRiME 2020 Conference earlier this month and can be downloaded from the ECS PRiME website (registration required). Find more information on EVG’s hybrid and fusion bonding solutions.
EVG Heterogeneous Integration Solutions
EVG offers a complete suite of HI process solutions, including: permanent wafer bonding, such as direct fusion and hybrid bonding for 3D packaging and metal bonding; D2W bonding with and without collective carriers for integration of III-V compound semiconductors and silicon as well as high-density 3D packaging; temporary bonding and debonding, including mechanical, slide-off/lift-off, and UV laser assisted; thin-wafer handling; integrated and stand-alone metrology for bond alignment, total thickness variation and film thickness measurement as well as bond interface inspection; and innovative lithography technologies, including mask aligners, coaters and developers, and maskless exposure/digital lithography.
EVG is a proud sponsor and exhibitor of the International Wafer-Level Packaging Conference and Exposition (IWLPC), which will be held virtually this month. EVG will present on “Maskless Lithography Optimized for Heterogeneous and Chiplet Integration” during the on-demand conference on
October 13-30.
