While at first glance, 3D integration technologies seem to be relegated to one two-hour session at this year’s SEMICON Europa, which takes place October 7-9, 2014 in Grenoble, France; in reality 3D integration is a pervasive technology that will be discussed in many different programs and sessions. To make it easier for anyone who wishes to focus their time learning how 3D integration applies in the various topic areas, I reviewed the program and abstracts, as well as interviewed Laurent Le Pailleur, Technology Line Management Director, STMicroelectronics, who organized the Low Power Conference with his committee, to put together this Guide to 3D at SEMICON Europa.
First of all, three “elevator speeches” during the Advanced Packaging Conference poster session (Tuesday, Oct 7 at 3:00pm) address 3D integration technologies. The authors and topics are listed here:
- Dietmar Vogel, Group Manager, Fraunhofer ENAS Advanced Stress Analysis on TSV Structures
- Thomas Kaiser, CEO, Interposers GmbH, 3D-printed Interposer as an Intermediate Layer for the 3D integration of Micro-Electronic Components
- Antonio La Manna, Program manager, imec Process Developments for 3D-IC Integration
The Low Power Conference, titled Highly Energy Efficient Nanotechnologies and Applications, kicks off Tuesday at 1:30. According to Le Pailleur, it was designed to touch all aspects of various applications where low power is critical, from high-end data centers to implantable medical devices. The structure of the conference agenda, he said, is to show how different technologies can be optimally engineered to address low power requirements. It begins with a market analysis from mobile to servers and IOT, moving to fully depleted silicon technologies to improving power efficiency of microprocessors, energy efficient design techniques and the EDA tools that enable them, to the end-applications themselves.
3D Integration is one of the enabling elements for low power that will be addressed by several speakers. In his talk, System Landscape for More Moore – from Technology to Architecture, Mustafa Badaroglu, Sr Program Manager, Qualcomm Technologies, is likely to touch on 3D integration when he presents solutions for system scaling beyond just CMOS scaling, in order to obtain the optimal balance between performance and power for today’s mobile products.
Additionally, Fabien Clermidy, Senior expert, CEA-LETI is expected to include 3D die stacking in his talk, Low-power Multiprocessing: from Embedded to Servers Multi-core, as a useful ingredient for closing the gap between these two application fields. Clermidy was closely involved in the WIOMING project, which developed Wide I/O DRAM on multicore platform.
On Wednesday afternoon, beginning at 2:15, the 3D integration session gets underway. It will cover recent updates on 3D circuit and process technologies and feature notable 3D leaders and experts presenting status of 3D circuits, including 3D TSV and monolithic 3D integration schemes, their manufacturing challenges and readiness for application specific systems. The day wraps up with exhibitor presentations. The full agenda is available here.
In addition to the various programs and sessions, I counted at least 20 exhibiting companies and research centers whose products and services are directly involved in 2.5D and 3D integrations technologies. Additionally, the Design Exhibition Area will be host to companies showcasing design tools, many of which target 3D TSV technologies. Be sure to stop by and learn about their latest developments. Visit the SEMICON Europa website for a complete look at this year’s event.
