Recent signs that we’re getting closer to commercialization of 3D ICs? For one, analog and sensor IC company, ams AG, threw down the gauntlet, announcing it is investing more than €25M ($33M) to add manufacturing capacity for 3D ICs in its fab located near Graz, Austria. Analog 3D ICs featuring through silicon vias (TSVs) are already a reality at ams. The company introduced its first 3D IC into production in its opto-sensor product in 2010. According to the company, the decision to invest and expand was made based on “soaring demand for its 3D stacked die services.” AMS expects the 3DIC facility to be fully operational by the end of this year. (Incidentally, the Franz Schrank, Project Manager 3D Integration, Principle Engineer R&D at ams, will present on the topic of sensor integration using 3D TSVs at this year’s SEMICON Europa, October 8-10, Dresden, Germany).
Another nod to high volume manufacturing is the joint announcement by Entegris and imec this week to collaborate on development of a fully automated system for handling thin 3D IC wafers post backside processing. According to imec’s Eric Beyne, this would significantly reduce development cost and improve the manufacturability of 3D IC technology.
And speaking of collaboration, SEMI’s Karen Savala issued a call to arms for 3DIC collaboration in a recent blog post, noting that “for 3D-IC to be widely adopted, meaningful collaboration throughout the value chain still needs to occur. At this time in the market, all the important players in the ecosystem have a different perspective.” She also draws comparisons of false starts for 3D ICs to the poorly executed transition to 300mm, saying “ The industry couldn’t agree when to introduce 300mm production and stop advanced development at 200mm, and they couldn’t afford to do both.” Sounds alarmingly familiar to the divided efforts of simultaneously bringing 450mm, EUV and 3D ICs to market, doesn’t it? But even in that race, Savala sees 3D IC as the viable path to pave. She cites “uncertainties in 450, EUV and the transition to new transistor architectures” causing experts to question the continuation of Moore’s Law, and ultimately embrace “more than Moore” options, especially 3D ICs “ that promise to improve bandwidth, reduce footprint, decrease power consumption, and lower cost.”
Lastly, in an EDA Café Interview with Herb Reiter, by Peggy Aycinena, discussion focused on what Reiter calls “the three legged stool” of technology choices comprising fully depleted SOI, 2.5D and 3D ICs, and FinFETS. While all are “3D” technologies, the all refer to different animals. Reiter gives a very comprehensive breakdown of each technology, explaining that all of them are capital intensive and risk prone, and it will ultimately be up to investors to decide where to put their money. “Until there is a clear winner in all of these technologies, and the individual strengths are clearly matched with specific applications, companies will continue to move forward cautiously,” notes Reiter. This echoes some of Savala’s points of different perspectives among the industry ecosystem. The question remains, will these technologies coexist because they are application specific? Or will some fade away into obscurity as investment decisions go elsewhere. As we say all to often, only time will tell. ~ F.v.T.
